CS61584A 데이터 시트보기 (PDF) - Cirrus Logic

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CS61584A

Dual T1/E1 Line Interface

Cirrus Logic 

DS261PP5

CS61584A

9.1.2 Mask Registers ................................................................................................... 25

9.1.3 Control A Registers ............................................................................................. 26

9.1.4 Control B Registers ............................................................................................. 27

9.1.5 Arbitrary Waveform Registers ............................................................................. 27

9.2 Serial Port Operation ....................................................................................................... 30

9.3 Parallel Port Operation .................................................................................................... 31

10. JTAG BOUNDARY SCAN .................................................................................................... 31

10.1 JTAG Data Registers (DR) ............................................................................................ 32

10.2 JTAG Instructions and Instruction Register (IR) ............................................................ 33

10.3 JTAG TAP Controller ..................................................................................................... 33

10.4 Test-Logic-Reset State .................................................................................................. 33

10.5 Run-Test/Idle State ........................................................................................................ 34

10.6 Select-DR-Scan State ................................................................................................... 34

10.7 Capture-DR State .......................................................................................................... 34

10.8 Shift-DR State ................................................................................................................ 34

10.9 Exit1-DR State ............................................................................................................... 34

10.10 Pause-DR State ........................................................................................................... 35

10.11 Exit2-DR State ............................................................................................................. 35

10.12 Update-DR State ......................................................................................................... 35

10.13 Select-IR-Scan State ................................................................................................... 35

10.14 Capture-IR State .......................................................................................................... 35

10.15 Shift-IR State ............................................................................................................... 35

10.16 Exit1-IR State .............................................................................................................. 36

10.17 Pause-IR State ............................................................................................................ 36

10.18 Exit2-IR State .............................................................................................................. 36

10.19 Update-IR State ........................................................................................................... 36

10.20 JTAG Application Examples ........................................................................................ 36

11. PIN DESCRIPTIONS ............................................................................................................ 39

12. PACKAGE DIMENSIONS .................................................................................................... 46

13. APPLICATIONS ................................................................................................................... 48

13.1 Line Interface ................................................................................................................. 48

13.2 Power Supply ................................................................................................................ 50

13.3 Quartz Crystal Specifications ........................................................................................ 50

13.4 Crystal Oscillator Specifications .................................................................................... 50

13.5 Transformers ................................................................................................................. 51

13.6 Designing for AT&T 62411 ............................................................................................ 51

13.7 Line Protection ............................................................................................................... 51

13.8 Loop Selection Equations .............................................................................................. 51

LIST OF TABLES

Table 1. Line Configuration Selections............................................................................................. 17

Table 3. Jitter Attenuation Control.................................................................................................... 19

Table 4. CS61584A Register Set ..................................................................................................... 23

Table 5. Status Registers ................................................................................................................. 24

Table 6. Mask Registers................................................................................................................... 25

Table 7. Control A Registers ............................................................................................................ 26

Table 8. Control B Registers ............................................................................................................ 27

Table 9. Arbitrary Waveform Registers ............................................................................................ 28

Table 10. Boundary Scan Register .................................................................................................. 32

Table 11. Device Identifcation Register............................................................................................ 33

Table 12. ......................................................................................................................................... 33

DS261FP1P5

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