CS61310(2003) 데이터 시트보기 (PDF) - Cirrus Logic

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CS61310
(Rev.:2003)

T1 Line Interface Unit

Cirrus Logic 

CS61310

T1 SWITCHING CHARACTERISTICS

(TA = -40°C to 85°C; TV+, RV+ = 5.0 V ±5%;

GND = 0 V; Inputs: Logic 0 = 0 V, Logic 1 = RV+; See Figures 1, 2, & 3)

Parameter

Symbol Min

Typ

Max

TCLK Frequency

ftclk

-

1.544

-

TCLK Duty Cycle

(Note 12) tpwh2/tpw2

45

50

55

MCLK Frequency

(Note 17) fmclk

-

1.544

-

RCLK Duty Cycle

(Notes 12, 18) tpwh1/tpw1

45

50

55

Rise Time, All Digital Outputs

(Note 19)

tr

-

-

85

Fall Time, All Digital Outputs

(Note 19)

tf

-

-

85

TPOS/TNEG to TCLK Falling Setup Time

tsu2

25

-

-

TCLK Falling to TPOS/TNEG Hold Time

th2

25

-

-

RPOS/RNEG Valid Before RCLK Falling

(Note 20) tsu1

150

274

-

RPOS/RNEG Valid Before RCLK Rising

(Note 21) tsu1

150

274

-

RPOS/RNEG Valid After RCLK Falling

(Note 20)

th1

150

274

-

RPOS/RNEG Valid After RCLK Rising

(Note 21)

th1

150

274

-

Notes: 17. MCLK provided by an external source or TCLK.

18. RCLK duty cycle will be 62.5% or 37.5% when jitter attenuator FIFO limits are reached.

19. At max load of 1.6 mA and 50 pF.

20. Host Mode (CLKE = 1).

21. Host Mode (CLKE = 0)

Units

MHz

%

MHz

%

ns

ns

ns

ns

ns

ns

ns

ns

6

DS440F1 FEB ‘03

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