CXA3197 데이터 시트보기 (PDF) - Sony Semiconductor

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CXA3197

10-bit 125MSPS D/A Converter

Sony Semiconductor 

CXA3197R

Pin Description and I/O Pin Equivalent Circuit

Pin No. Symbol I/O Typical voltage level

Equivalent circuit

Description

1 to 6

45 to 48

DA0 to DA9

I

TTL

7 to 16 DB0 to DB9 I

TTL

DVCC1

1 to 6

45 to 48

7 to 16

DGND1

Side A data input.

1.5V

Side B data input.

17 DIV2IN

I

TTL

DVCC1

17

DGND1

18 DIV2OUT O

TTL

19 CLK/T

DVCC1

I

TTL

19

DGND1

1/2 frequency-divided

clock input.

Use this pin in MUX.1A

or MUX.2 mode.

1.5V Leave open for other

modes.

DVCC1

18

DGND1

1/2 frequency-divided

clock output.

The 1/2 frequency-

divided clock signal

(DIV2OUT) is output in

MUX.1A mode.

Set to high impedance

for other modes.

Clock input.

Use this pin when the

clock is input at TTL

level.

1.5V At this time, leave Pins

20 and 21 open.

–5–

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