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CXD1261 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD1261
Sync Signal, Timing Signal Generator for CCD Cameras
Sony Semiconductor
CXD1261 Datasheet PDF : 23 Pages
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Pin Configuration
CXD1261AR
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
VR/FLD 49
HTSG 50
V
DD
51
EXT 52
V
SS
53
TST10 54
TST11 55
V
DD
56
TST12 57
TST13 58
V
SS
59
TST14 60
TST15 61
TST16 62
CBLK 63
SYNC 64
32 V
SS
31 XV4
30 XSG2
29 XV3
28 XSG1
27 XV1
26 XV2
25 XSUB
24 V
DD
23 RG
22 V
SS
21 TST3
20 H2
19 TST2
18 H1
17 V
DD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Mode name Pin No. PRESET
L
H
D1
D2
ENB
4
L
EIA
CCIR
5
L
Field readout
Frame readout
∗
12
H
Normal
Shutter
∗
ED0
13
H
ED1
14
H
Shutter speed
ED2
15
H
PS
16
H
Serial input
Parallel input
EXT
52
L
Internal
External
TST1
6
—
Normally High
TST13
58
—
Normally Low
Note)
Normally open for TST except as shown in the above table.
∗
During frame accumulation (readout), low-speed shutter does not operate normally.
–2–
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