CY14B101K(RevE) 데이터 시트보기 (PDF) - Cypress Semiconductor
부품명
상세내역
제조사
CY14B101K Datasheet PDF : 24 Pages
| |||
Table 1. Mode Selection
CE
WE
H
X
L
H
L
L
L
H
L
H
L
H
L
H
PRELIMINARY
CY14B101K
OE
A15 – A0
Mode
IO
Power
X
X
Not Selected Output High-Z
Standby
L
X
READ SRAM Output Data
Active
X
X
WRITE SRAM Input Data
Active
L
0x4E38
READ SRAM Output Data
Active[1, 2, 3]
0xB1C7
READ SRAM Output Data
0x83E0
READ SRAM Output Data
0x7C1F
READ SRAM Output Data
0x703F
READ SRAM Output Data
0x8B45
Autostore
Output Data
Disable
L
0x4E38
READ SRAM Output Data
Active[1, 2, 3]
0xB1C7
READ SRAM Output Data
0x83E0
READ SRAM Output Data
0x7C1F
READ SRAM Output Data
0x703F
Read SRAM Output Data
0x4B46
Autostore
Output Data
Enable
L
0x4E38
Read SRAM
Output Data Active ICC2[1, 2, 3]
0xB1C7
Read SRAM Output Data
0x83E0
Read SRAM Output Data
0x7C1F
Read SRAM Output Data
0x703F
Read SRAM Output Data
0x8FC0
Nonvolatile Output High-Z
Store
L
0x4E38
Read SRAM
Output Data
Active[1, 2, 3]
0xB1C7
Read SRAM Output Data
0x83E0
Read SRAM Output Data
0x7C1F
Read SRAM Output Data
0x703F
Read SRAM Output Data
0x4C63
Nonvolatile Output High-Z
Recall
Notes
1. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.
2. While there are 17 address lines on the CY14B101K, only the lower 16 lines are used to control software modes.
3. IO state depends on the state of OE. The IO table shown is based on OE Low.
Document #: 001-06401 Rev. *E
Page 5 of 24
[+] Feedback
Share Link: 