CY14B101K(RevE) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY14B101K Datasheet PDF : 24 Pages
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PRELIMINARY
CY14B101K
Low Average Active Power
CMOS technology provides the CY14B101K, the benefit of
drawing significantly less current when it is cycled at times
longer than 50 ns. Figure 2 on page 6 shows the relationship
Figure 2. Current vs. Cycle Time
between ICC and READ/WRITE cycle time. Worst case current
consumption is sREADhown for commercial temperature
range, VCC = 3.6V, and chip enable at maximum frequency.
Only standby current is drawn when the chip is disabled.
The overall average current drawn by the CY14B101K
depends on the following items:
1. The duty cycle of chip enable.
2. The overall cycle rate for accesses.
3. The ratio of READs to WRITEs.
4. The operating temperature.
5. The VCC level.
6. IO loading.
Real-Time Clock Operation
nvTIME Operation
The CY14B101K offers internal registers that contain clock,
alarm, watchdog, interrupt, and control functions. Internal
double buffering of the clock and the clock/timer information
registers prevents accessing transitional internal clock data
during a READ or WRITE operation. Double buffering also
circumvents disrupting normal timing counts or clock accuracy
of the internal clock while accessing clock data. Clock and
Alarm Registers store data in BCD format.
Clock Operations
The clock registers maintain time up to 9,999 years in one
second increments. The user can set the time to any calendar
time and the clock automatically keeps track of days of the
week, month, leap years, and century transitions. There are
eight registers dedicated to the clock functions that are used
to set time with a WRITE cycle and to READ time during a
READ cycle. These registers contain the Time of Day in BCD
format. Bits defined as “0” are currently not used and are
reserved for future use by Cypress.
Reading the Clock
While the double-buffered RTC register structure reduces the
chance of reading incorrect data from the clock, you have to
halt internal updates to the CY14B101K clock registers before
reading clock data to prevent the reading of data in transition.
Stopping the internal register updates does not affect clock
accuracy. The update process is stopped by writing a “1” to the
READ bit “R” (in the flags register at 0x1FFF0), and will not
restart until a “0” is written to the READ bit. The RTC registers
can then be READ while the internal clock continues to run.
Within 20 ms after a “0” is written to the READ bit, all
CY14B101K registers are simultaneously updated.
Setting the Clock
Setting the WRITE bit “W” (in the flags register at 0x1FFF0) to
a “1” halts updates to the CY14B101K registers. The correct
day, date, and time can then be written into the registers in
24-hour BCD format. The time written is referred to as the
“Base Time.” This value is stored in nonvolatile registers and
used in calculation of the current time. Resetting the WRITE
bit to “0” transfers those values to the actual clock counters,
after which the clock resumes normal operation.
Backup Power
The RTC in the CY14B101K is intended for permanently
powered operation. Either the VRTCcap or VRTCbat pin is
connected depending on whether a capacitor or battery is
chosen for the application. When primary power, VCC, fails and
drops below VSWITCH the device will switch to the backup
power supply.
The clock oscillator uses very little current which maximizes
the backup time available from the backup source. Regardless
of clock operation with the primary source removed, the data
stored in nvSRAM is secure, having been stored in the
nonvolatile elements as power was lost.
During backup operation the CY14B101K consumes a
maximum of 300 nA at 2 volts. Capacitor or battery values
must be chosen according to the application.
Backup time values based on maximum current specs are
shown in the following table. Nominal times are approximately
three times longer.
Table 2. RTC Backup Time
Capacitor Value
0.1F
0.47F
1.0F
Backup Time
72 hours
14 days
30 days
Using a capacitor has the obvious advantage of recharging the
backup source each time the system is powered up. If a
battery is used, a 3V lithium is recommended and the
CY14B101K will only source current from the battery when the
primary power is removed. The battery will not however be
Document #: 001-06401 Rev. *E
Page 6 of 24
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