CY14B101L-SZ25XC 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY14B101L-SZ25XC Datasheet PDF : 18 Pages
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CY14B101L
1 Mbit (128K x 8) nvSRAM
Features
Functional Description
■ 25 ns, 35 ns, and 45 ns Access Times
■ Pin compatible with STK14CA8
■ Hands off Automatic STORE on Power Down with only a small
Capacitor
■ STORE to QuantumTrap™ Nonvolatile Elements is initiated by
software, hardware, or AutoStore™ on Power Down
■ RECALL to SRAM initiated by Software or Power Up
■ Unlimited READ, WRITE, and RECALL Cycles
■ 200,000 STORE Cycles to QuantumTrap
■ 20 year Data Retention at 55°C
■ Single 3V +20%, –10% Operation
■ Commercial and Industrial Temperature
■ 32-pin (300 mil) SOIC and 48-pin (300 mil) SSOP packages
■ RoHS Compliance
The Cypress CY14B101L is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent, nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
Logic Block Diagram
A5
A6
A7
A8
A9
A 12
A 13
A 14
A 15
A 16
QuantumTrap
1024 x 1024
STORE
STATIC RAM
ARRAY
1024 X 1024
RECALL
VCC
VCAP
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
- A15 A0
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
COLUMN IO
COLUMN DEC
A0 A1 A2 A3 A4 A10 A11
OE
CE
WE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-06400 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 20, 2009
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