CY14C101I(2012) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY14C101I
(Rev.:2012)
(Rev.:2012)
Cypress Semiconductor
CY14C101I Datasheet PDF : 41 Pages
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PRELIMINARY
CY14C101I
CY14B101I
CY14E101I
By Master
SDA Line
By nvSRAM
Figure 11. Single-Byte Write into nvSRAM (except Hs-mode)
S
T
A
R Memory Slave Address
T
Most Signifiant Address Byte
Least Significant Address Byte
S 1 0 1 0 A2 A1 A16 0
A
A
A
Data Byte
S
T
0
P
P
A
By Master
SDA Line
By nvSRAM
Figure 12. Multi-Byte Write into nvSRAM (except Hs-mode)
S
T
A
R Memory Slave Address
T
Most Significant Address
Byte
Least Significant Address
Byte
Data Byte 1
S 1 0 1 0 A2 A1 A16 0
A
A
A
A
Data Byte N
S
T
0
P
P
A
Figure 13. Single-Byte Write into nvSRAM (Hs-mode)
S
T
S
A
Most Significant Address
Least Significant Address
T
By Master
R Hs-mode command
Memory Slave Address
Byte
Byte
Data Byte
0
T
P
SDA Line
S 0 0 0 0 1 X X X Sr 1 0 1 0 A2 A1 A16 0
P
By nvSRAM
A
A
A
A
A
By Master
SDA Line
By nvSRAM
By Master
SDA Line
Figure 14. Multi-Byte Write into nvSRAM (Hs-mode)
S
T
A
R Hs-mode command
T
S 0 0 0 01 X X X
Memory Slave Address
Sr 1 0 1 0 A2 A1 A16 0
Most Significant Address
Byte
Least Significant Address
Byte
A
Data Byte 2
A
Data Byte 3
A
A
S
T
Data Byte N
0
P
P
By nvSRAM
A
A
A
Data Byte 1
A
Document Number: 001-54391 Rev. *G
Page 11 of 41
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