CY14B256L(2007) 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY14B256L
(Rev.:2007)

256-Kbit (32K x 8) nvSRAM

Cypress Semiconductor 

PRELIMINARY

CY14B256L

Preventing AutoStore

Disable the AutoStore function by initiating an AutoStore

Disable Sequence. A sequence of READ operations is

performed in a manner similar to the software STORE initi-

ation. To initiate the AutoStore Disable Sequence, the

following sequence of CE-controlled READ operations must

be performed:

1. Read address 0x0E38 valid READ

2. Read address 0x31C7 valid READ

3. Read address 0x03E0 valid READ

4. Read address 0x3C1F valid READ

5. Read address 0x303F valid READ

6. Read address 0x03F8 AutoStore Disable

Re-enable the AutoStore by initiating an AutoStore Enable

sequence. A sequence of READ operations is performed in a

manner similar to the software RECALL initiation. To initiate

the AutoStore Enable sequence, the following sequence of

CE-controlled READ operations must be performed:

1. Read address 0x0E38 valid READ

2. Read address 0x31C7 valid READ

3. Read address 0x03E0 valid READ

4. Read address 0x3C1F valid READ

5. Read address 0x303F valid READ

6. Read address 0x07F0 AutoStore Enable

If the AutoStore function is disabled or re-enabled, a manual

STORE operation (Hardware or Software) must be issued to

save the AutoStore state through subsequent power down

cycles. The part comes from the factory with AutoStore

enabled.

Noise Considerations

The CY14B256L is a high speed memory and so must have a

high frequency bypass capacitor of approximately 0.1 µF

connected between VCC and VSS, using leads and traces that

are as short as possible. As with all high speed CMOS ICs,

careful routing of power, ground, and signals reduces circuit

noise.

Low Average Active Power

CMOS technology provides the CY14B256L the benefit of

drawing less current when it is cycled at times longer than

50 ns. Figure 2 shows the relationship between ICC and

READ/WRITE cycle time. Worst-case current consumption is

shown for commercial temperature range, VCC = 3.45V, and

chip enable at maximum frequency. Only standby current is

drawn when the chip is disabled. The overall average current

drawn by the CY14B256L depends on the following items:

• The duty cycle of chip enable.

• The overall cycle rate for accesses.

• The ratio of READs to WRITEs.

• The operating temperature.

• The VCC level.

• IO loading.

Figure 2. Current vs. Cycle Time

Document #: 001-06422 Rev. *E

Page 6 of 17

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