CY22180SXI-XXX 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY22180SXI-XXX

Very Low Jitter Field and Factory Programmable Clock Generator

Cypress Semiconductor 

PRELIMINARY

Switching Waveforms

Figure 1. Duty Cycle Timing (DC = t1A/t1B)

OUTPUT

t1A t1B

CY22180

VDD

POWER

DOWN

0V

CLKOUT

(Asynchronous)

VDD

OUTPUT

ENABLE

0V

CLKOUT

(Asynchronous)

Figure 2. Output Rise/Fall Time (CLKOUT and REFOUT)

OUTPUT

Tr

Tf

Output Rise time (Tr) = (0.6 x VDD)/SR1 (or SR3)

Output Fall time (Tf) = (0.6 x VDD)/SR2 (or SR4)

Refer to AC Electrical Characteristics table for SR (Slew Rate) values.

VDD

0V

Figure 3. Power Down Timing and Power Up Timing

VIH

VIL

tPU

High Impedance

tSTP

Figure 4. Output Enable/Disable Timing

VIH

VIL

TOE2

High Impedance

TOE1

Document #: 001-15577 Rev. **

Page 6 of 8

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