CY7B9920(1997) 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY7B9920 Datasheet PDF : 7 Pages
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CY7B9910
CY7B9920
Electrical Characteristics Over the Operating Range (continued)
Parameter
IOS
ICCQ
Description
Output Short Circuit
Current[2]
Operating Current Used by
Internal Circuitry
ICCN
Output Buffer Current per
Output Pair[3]
PD
Power Dissipation per
Output Pair[4]
Test Conditions
VCC = Max., VOUT
= GND (25°C only)
VCCN = VCCQ = Max., Com’l
All Input
Mil/Ind
Selects Open
VCCN = VCCQ = Max.,
IOUT = 0 mA
Input Selects Open, fMAX
VCCN = VCCQ = Max.,
IOUT = 0 mA
Input Selects Open, fMAX
CY7B9910
Min.
Max.
–250
85
90
14
78
CY7B9920
Min.
Max. Unit
N/A mA
85
mA
90
19
mA
104[5] mW
Capacitance[6]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz, VCC = 5.0V
10
pF
Notes:
1. These inputs are normally wired to VCC, GND, or left unconnected (actual threshold voltages vary as a percentage of VCC). Internal termination resistors hold unconnected
inputs at VCC/2. If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional tLOCK time before all data sheet limits are
achieved.
2. Tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only. CY7B9920 outputs are not short
circuit protected.
3. Total output current per output pair can be approximated by the following expression that includes device current plus load current:
CY7B9910:
ICCN = [(4 + 0.11F) + [((835 – 3F)/Z) + (.0022FC)]N] x 1.1
CY7B9920:
ICCN = [(3.5+ .17F) + [((1160 – 2.8F)/Z) + (.0025FC)]N] x 1.1
Where
F = frequency in MHz
C = capacitive load in pF
Z = line impedance in ohms
N = number of loaded outputs; 0, 1, or 2
FC = F < C
4. Total power dissipation per output pair can be approximated by the following expression that includes device power dissipation plus power dissipation due to
the load circuit:
CY7B9910:
PD = [(22 + 0.61F) + [((1550 – 2.7F)/Z) + (.0125FC)]N] x 1.1
CY7B9920:
PD = [(19.25+ 0.94F) + [((700 + 6F)/Z) + (.017FC)]N] x 1.1
See note 3 for variable definition.
5. CMOS output buffer current and power dissipation specified at 50-MHz reference frequency.
6. Applies to REF and FB inputs only. Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
5V
R1 R1=130
R2=91
CL = 50 pF (CL = 30pF for –5 and – 2 devices)
CL
R2 (Includes fixture and probe capacitance)
7B9910–3
TTL AC Test Load (CY7B9910)
VCC
R1=100
R1
R2=100
CL = 50 pF (CL =30 pF for –5 and – 2devices)
(Includes fixture and probe capacitance)
CL
R2
7B9910–5
CMOS AC Test Load (CY7B9920)
3.0V
2.0V
Vth =1.5V
0.8V
0.0V
2.0V
Vth =1.5V
0.8V
≤1ns
≤1ns
7B9910–4
TTL Input Test Waveform (Cy7B9910)
VCC
80%
Vth = VCC/2
20%
0.0V
80%
Vth = VCC/2
20%
≤ 3ns
≤ 3ns
7B9910–6
CMOS Input Test Waveform (CY7B9920)
3
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