M28W320 데이터 시트보기 (PDF) - STMicroelectronics

부품명

상세내역

제조사

M28W320

32 Mbit (2Mb x16, Boot Block) 3V Supply Flash Memory

STMicroelectronics 

M28W320FCT, M28W320FCB

1

Summary description

Summary description

The M28W320FCT and M28W320FCB are 32 Mbit (2 Mbit x 16) non-volatile Flash

memories that can be erased electrically at the block level and programmed in-system on a

Word-by-Word basis. These operations can be performed using a single low voltage (2.7 to

3.6V) supply. VDDQ allows to drive the I/O pin down to 1.65V. An optional 12V VPP power

supply is provided to speed up customer programming.

The devices feature an asymmetrical blocked architecture. They have an array of 71 blocks:

8 Parameter Blocks of 4 KWord and 63 Main Blocks of 32 KWord. M28W320FCT has the

Parameter Blocks at the top of the memory address space while the M28W320FCB locates

the Parameter Blocks starting from the bottom. The memory maps are shown in Figure 4:

Block Addresses.

Both devices feature an instant, individual block locking scheme that allows any block to be

locked or unlocked with no latency, enabling instant code and data protection. All blocks

have three levels of protection. They can be locked and locked-down individually preventing

any accidental programming or erasure. There is an additional hardware protection against

program and erase. When VPP ≤ VPPLK all blocks are protected against program or erase.

All blocks are locked at Power Up.

Each block can be erased separately. Erase can be suspended in order to perform either

read or program in any other block and then resumed. Program can be suspended to read

data in any other block and then resumed. Each block can be programmed and erased over

100,000 cycles.

The device includes a Protection Register to increase the protection of a system design.

The Protection Register is divided into two segments, the first is a 64 bit area which contains

a unique device number written by ST, while the second is a 128 bit area, one-time-

programmable by the user. The user programmable segment can be permanently protected.

Figure 5, shows the Protection Register Memory Map.

Program and Erase commands are written to the Command Interface of the memory. An on-

chip Program/Erase Controller takes care of the timings necessary for program and erase

operations. The end of a program or erase operation can be detected and any error

conditions identified. The command set required to control the memory is consistent with

JEDEC standards.

The memory is offered in TSOP48 (10 X 20mm) and TFBGA47 (6.39 x 6.37mm, 0.75mm

pitch) packages and is supplied with all the bits erased (set to ’1’).

In order to meet environmental requirements, ST offers the M28W320FCT and

M28W320FCB in ECOPACK® packages.ECOPACK packages are Lead-free. The category

of second Level Interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

7/69

Share Link: