A386DX 데이터 시트보기 (PDF) - Intel

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A386DX

32-BIT CHMOS MICROPROCESSOR WITH INTEGRATED MEMORY MANAGEMENT

Intel 

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Intel386TM DX MICROPROCESSOR

NOTE

0 indicates Intel reserved do not define see section 2 3 10

Figure 2-3 Flags Register

231630 – 50

VM (Virtual 8086 Mode bit 17)

The VM bit provides Virtual 8086 Mode within

Protected Mode If set while the Intel386 DX

is in Protected Mode the Intel386 DX will

switch to Virtual 8086 operation handling

segment loads as the 8086 does but gener-

ating exception 13 faults on privileged op-

codes The VM bit can be set only in Protect-

ed Mode by the IRET instruction (if current

privilege level e 0) and by task switches at

any privilege level The VM bit is unaffected

by POPF PUSHF always pushes a 0 in this

bit even if executing in virtual 8086 Mode

The EFLAGS image pushed during interrupt

processing or saved during task switches will

contain a 1 in this bit if the interrupted code

was executing as a Virtual 8086 Task

RF (Resume Flag bit 16)

The RF flag is used in conjunction with the

debug register breakpoints It is checked at

instruction boundaries before breakpoint pro-

cessing When RF is set it causes any debug

fault to be ignored on the next instruction RF

is then automatically reset at the successful

completion of every instruction (no faults are

signalled) except the IRET instruction the

POPF instruction (and JMP CALL and INT

instructions causing a task switch) These in-

structions set RF to the value specified by the

memory image For example at the end of

the breakpoint service routine the IRET

instruction can pop an EFLAG image having

the RF bit set and resume the program’s exe-

cution at the breakpoint address without gen-

erating another breakpoint fault on the same

location

NT (Nested Task bit 14)

This flag applies to Protected Mode NT is set

to indicate that the execution of this task is

nested within another task If set it indicates

that the current nested task’s Task State

Segment (TSS) has a valid back link to the

previous task’s TSS This bit is set or reset by

control transfers to other tasks The value of

NT in EFLAGS is tested by the IRET instruc-

tion to determine whether to do an inter-task

return or an intra-task return A POPF or an

IRET instruction will affect the setting of this

bit according to the image popped at any

privilege level

IOPL (Input Output Privilege Level bits 12-13)

This two-bit field applies to Protected Mode

IOPL indicates the numerically maximum CPL

(current privilege level) value permitted to ex-

ecute I O instructions without generating an

exception 13 fault or consulting the I O Per-

mission Bitmap It also indicates the maxi-

mum CPL value allowing alteration of the IF

(INTR Enable Flag) bit when new values are

popped into the EFLAG register POPF and

IRET instruction can alter the IOPL field when

executed at CPL e 0 Task switches can al-

ways alter the IOPL field when the new flag

image is loaded from the incoming task’s

TSS

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