80960-40, -33, -25
Figure 39. Burst, Pipelined Read Request With Wait States, 8-Bit Bus
Function
Bit
Value
31-23
0
0..0
Byte
Order
22
X
x
A
PCLK
Bus
Width
NWDD
NWAD
NXDA
NRDD
NRAD
Pipe-
Lining
External
Ready
Control
Burst
21 20-19 18-17 16-12 11-10 9-8
7-3
2
1
0
0
8-bit
X
X
X
1
2
ON Disabled Enabled
0
00
xx
xxxxx
xx
01 00010
1
0
1
21 D
1 D 1 D 1 A’ 2
D
1 D’
ADS
A31:4, SUP,
DMA, D/C,
LOCK
W/R
A3:2
BE1/A1,
BE0/A0
D31:0
Valid
Valid
A3:2 = 00, 01, 10, or 11
Valid
A1:0 = 00
A1:0 = 01 A1:0 = 10 A1:0 = 11
Valid
D7:0
Byte 0
D7:0
Byte 1
D7:0
Byte 2
D7:0
Byte 3
In-
valid
In-
valid
In-
valid
In-
valid
D7:0
D’
WAIT
BLAST
DT/R
DEN
Non-pipelined request concludes,
pipelined reads begin.
Pipelined reads conclude,
non-pipelined requests begin.
F_CX039A
Datasheet
61