IS61LV3216L-20T 데이터 시트보기 (PDF) - Integrated Silicon Solution
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IS61LV3216L-20T Datasheet PDF : 8 Pages
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IS61LV3216L
ISSI ®
CAPACITANCE(1)
Symbol
CIN
COUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
VIN = 0V
VOUT = 0V
Max.
Unit
6
pF
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
tRC Read Cycle Time
tAA Address Access Time
tOHA Output Hold Time
tACE CE Access Time
tDOE OE Access Time
tHZOE(2) OE to High-Z Output
tLZOE(2) OE to Low-Z Output
tHZCE(2 CE to High-Z Output
tLZCE(2) CE to Low-Z Output
tBA LB, UB Access Time
tHZB LB, UB to High-Z Output
tLZB LB, UB to Low-Z Output
-10
Min. Max.
10 —
— 10
3—
— 10
—5
05
0—
05
3—
—5
05
5—
-12
Min. Max.
12 —
— 12
3—
— 12
—6
06
0—
06
3—
—6
06
5—
-15
Min. Max.
15 —
— 15
3—
— 15
—7
07
0—
07
3—
—7
07
5—
-20
Min. Max. Unit
20 — ns
— 20 ns
3 — ns
— 20 ns
— 8 ns
0 8 ns
0 — ns
0 8 ns
3 — ns
— 8 ns
0 8 ns
5 — ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
AC TEST LOADS
3.3V
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1a and 1b
319 Ω
3.3V
319 Ω
OUTPUT
OUTPUT
30 pF
Including
jig and
scope
353 Ω
5 pF
Including
jig and
scope
353 Ω
Figure 1a.
Figure 1b.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00
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