CY3685 데이터 시트보기 (PDF) - Cypress Semiconductor
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CY3685 Datasheet PDF : 9 Pages
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3.0 Pin Assignments
3.1 Pin Diagram
CY7C68023/CY7C68024
R_B1# 1
R_B2# 2
AVCC 3
XTALOUT 4
XTALIN 5
AGND 6
AVCC 7
DPLUS 8
DMINUS 9
AGND 10
VCC 11
GND 12
N/C 13
GND 14
EZ-USB NX2LP
56-pin QFN
42 RESET#
41 GND
40 N/C
39 N/C
38 WP_SW#
37 WP_NF#
36 LED2#
35 LED1#
34 ALE
33 CLE
32 VCC
31 RE1#
30 RE0#
29 WE#
Figure 3-1. 56-pin QFN
3.2 Pin Descriptions
Pin Name Type
1 R_B1#[1]
I
Default State at Start-up
Description
Z
Ready/Busy 1 (2.2k to 4k pull-up resistor is required)
2 R_B2#
I
Z
Ready/Busy 2 (2.2k to 4k pull-up resistor is required)
3
AVCC PWR
PWR
Analog 3.3V supply
4 XTALOUT Xtal
N/A
Crystal output
5 XTALIN Xtal
N/A
Crystal input
6
AGND GND
GND
Ground
7
AVCC PWR
PWR
Analog 3.3V supply
8 DPLUS I/O
Z
USB D+
9 DMINUS I/O
Z
USB D-
10 AGND GND
GND
Ground
11
VCC PWR
PWR
3.3V supply
12
GND GND
GND
Ground
13
N/C
N/A
N/A
No connect
14
GND GND
GND
Ground
Note:
1. A # sign after the pin name indicates that it is an active LOW signal.
Document #: 38-08055 Rev. *A
Page 2 of 9
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