DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

CY8C41223 데이터 시트보기 (PDF) - Cypress Semiconductor

부품명
상세내역
제조사
CY8C41223
Cypress
Cypress Semiconductor Cypress
CY8C41223 Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRELIMINARY
4.7 Additional System Resources
System Resources, some of which have been previously
listed, provide additional capability useful to complete systems
implemented in a single power block. Additional resources
include an I2C master and slave, low voltage detection, and
power on reset. Brief statements describing the merits of each
system resource are presented below.
• Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks can be
routed to both the digital and analog systems. Additional
clocks can be generated using digital PSoC blocks as clock
dividers.
• The I2C module provides 50-, 100-, and 400-kHz commu-
nication over two wires. Slave, master, and multi-master
modes are all supported.
• Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
• An internal 1.3 voltage reference provides an absolute
reference for the analog system, including ADCs and DACs.
4.8 Development Tools
• Standard Cypress PSoC IDE tools are available for
debugging the CY8C41x23 family of parts. However, the
additional trace length and a minimal ground plane in the
Flexpod can create noise problems that make it difficult to
debug a Power PSoC design. A custom bonded On-Chip
Debug (OCD) device is available in an 32-pin QFN package.
The OCD device is recommended for debugging designs
that have high current and/or high analog accuracy require-
ments. The QFN package is compact and can be connected
to the ICE through a high density connector.
• In-System Serial Programming (ISSP) is available.
However, ISSP for Power PSoC differs from ISSP for
standard PSoC devices. With Power PSoC devices, the
power pin (HVdd) should not be connected directly to the
Vdd pin of the ISSP connector. Doing so can damage the
programming device.
CY8C41123 and CY8C41223
Document 001-00360 Rev. *A
Page 4 of 36

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]