PEEL22LV10AZ 데이터 시트보기 (PDF) - International Cmos Technology

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PEEL22LV10AZ

CMOS Programmable Electrically Erasable Logic Device

International Cmos Technology 

Standard

Load

Output

CL

3.15V

R1

Thevenin

Equivalent

Output

R2

PEELTM 22LV10AZ

VL

RL

CL

Figure 8 - PEEL™ Device and Array Test Loads

Technology

R1

R2

RL

CMOS

TTL

Table 7 - Ordering Information

274kΩ

315Ω

257kΩ

548Ω

110kΩ

200Ω

Part Number

Speed

Temperature

PEEL22LV10AZP-25

PEEL22LV10AZPI-35

PEEL22LV10AZJ-25

PEEL22LV10AZJI-35

PEEL22LV10AZS-25

PEEL22LV10AZSI-35

PEEL22LV10AZT-25

PEEL22LV10AZTI-35

25ns

35ns

25ns

35ns

25ns

35ns

25ns

35ns

Commercial

Industrial

Commercial

Industrial

Commercial

Industrial

Commercial

Industrial

VL

1.30V

2.00V

CL

33 pF

33 pF

Package

24-pin Plastic DIP

24-pin Plastic DIP

28-pin PLCC

28-pin PLCC

24-pin SOIC

24-pin SOIC

24-pin TSSOP

24-pin TSSOP

Device Suffix

PEELTM 22LV10AZ PI-35

Package

P = 24-pin Plactic 300 mil DIP

J = 24-pin Plastic (J) Leaded Chip Carrier (PLCC)

S = 24-pin SOIC 300 mil Gullwing

T = 24-pin TSSOP 170 mil

Figure 9 - Part Number

Speed

-25 = 25ns tpd

-35 = 35ns tpd

T em p eratu re

(blank) = Commercial 0° to 70° C

I = Industrial -40° to 85° C

9

04-02-037D

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