DMC73C168 데이터 시트보기 (PDF) - Daewoo Semiconductor

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DMC73C168

8Bit Single Chip Microcontroller

Daewoo Semiconductor 

8Bit Single Chip Microcontroller

11

DMC73C168

NAME PIN NO. I/O

FUNCTION DESCRIPTION

NC

78

No connection

PORT TYPE

RESET

80

I System reset request input port.

The reset pin must be held low for minimum of 5 internal

clock cycles to guarantee recognition by the device.

The dev ice initialization requires 15 machine cycles.

CE/INT1 79

I Device selection Signal input port.

External interrupt input port.

This port can be used as a Chip Enable input.

W hen activated, CPU resumes its operation from HALT

mode

Schimitt-

Tri gger-IN

4. ARCHITECTURE

The DMC73C168 has a maximum memory address space of 64K bytes and only the Single-Chip mode.

On-Chip memory spaces are configured as shown in Table 4.1.

In the sections that follow, the Register File (RF) and the Peripheral File (PF) are described along

with three important registers in the CPU : the Stack Pointer (SP), the Status Register (ST), and the

Program Counter (PC)

Memory Address

> 0000

> 00FF

> 0132

> 013F

> 01BF

> C005

> FFFF

Register File (RF)

Peripheral File (PF)

Reserved

128 byte PRF

Not Available

16K bytes ROM

> 0100

; 256 byte RAM

> 0133

> 0140

> 01C0

> C006

; 128 byte RAM

Table 4-1. DMC73C168 Memory Map

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