DM9010B 데이터 시트보기 (PDF) - Davicom Semiconductor, Inc.

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DM9010B

10/100 Mbps Single Chip Ethernet Controller With General Processor Interface

Davicom Semiconductor, Inc. 

DM9010B

Single Chip Ethernet Controller with General Processor Interface

6.13 EEPROM & PHY ADDRESS REGISTER (0CH) ............................................................................................. 22

6.14 EEPROM & PHY DATA REGISTER (EE_PHY_L：0DH EE_PHY_H：0EH) ........................................... 22

6.15 WAKE UP CONTROL REGISTER (0FH) .......................................................................................................... 22

6.16 PHYSICAL ADDRESS REGISTER (10H~15H) ................................................................................................. 23

6.17 MULTICAST ADDRESS REGISTER (16H~1DH) .............................................................................................. 23

6.18 GENERAL PURPOSE CONTROL REGISTER (1EH) ........................................................................................... 23

6.19 GENERAL PURPOSE REGISTER (1FH)........................................................................................................... 23

6.20 TX SRAM READ POINTER ADDRESS REGISTER (22H~23H)......................................................................... 24

6.21 RX SRAM WRITE POINTER ADDRESS REGISTER (24H~25H)....................................................................... 24

6.22 VENDOR ID REGISTER (28H~29H)............................................................................................................... 24

6.23 PRODUCT ID REGISTER (2AH~2BH) ........................................................................................................... 24

6.24 CHIP REVISION REGISTER (2CH) ................................................................................................................. 24

6.25 TRANSMIT CONTROL REGISTER 2 (2DH) ...................................................................................................... 24

6.26 OPERATION TEST CONTROL REGISTER (2EH) .............................................................................................. 25

6.27 SPECIAL MODE CONTROL REGISTER (2FH).................................................................................................. 25

6.28 EARLY TRANSMIT CONTROL/STATUS REGISTER (30H) ................................................................................. 25

6.29 TRANSMIT CHECK SUM CONTROL REGISTER (31H) ...................................................................................... 26

6.30 RECEIVE CHECK SUM CONTROL STATUS REGISTER (32H)............................................................................ 26

6.31 EXTERNAL PHYCEIVER ADDRESS REGISTER (33H) ...................................................................................... 26

6.32 GENERAL PURPOSE CONTROL REGISTER 2 (34H) ........................................................................................ 27

6.33 GENERAL PURPOSE REGISTER 2 (35H)........................................................................................................ 27

6.34 GENERAL PURPOSE CONTROL REGISTER 3 (36H) ........................................................................................ 27

6.35 GENERAL PURPOSE REGISTER 3 (37H)........................................................................................................ 27

6.36 PROCESSOR BUS CONTROL REGISTER (38H)............................................................................................... 27

6.37 INT PIN CONTROL REGISTER (39H) ............................................................................................................. 28

6.38 MONITOR REGISTER 1 (40H)........................................................................................................................ 28

6.39 MONITOR REGISTER 2 (41H)........................................................................................................................ 28

6.40 SYSTEM CLOCK TURN ON CONTROL REGISTER (50H) ................................................................................. 28

6.41 RESUME SYSTEM CLOCK CONTROL REGISTER (51H) ................................................................................... 28

6.42 MEMORY DATA PRE-FETCH READ COMMAND WITHOUT ADDRESS INCREMENT REGISTER (F0H) .................... 28

6.43 MEMORY DATA READ COMMAND WITHOUT ADDRESS INCREMENT REGISTER (F1H) ....................................... 29

6.44 MEMORY DATA READ COMMAND WITH ADDRESS INCREMENT REGISTER (F2H) ............................................. 29

6.45 MEMORY DATA READ ADDRESS REGISTER (F4H~F5H) ................................................................................ 29

6.46 MEMORY DATA WRITE COMMAND WITHOUT ADDRESS INCREMENT REGISTER (F6H)...................................... 29

Preliminary

3

Version: DM9010B--DS-P01

September 5, 2007

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