DM9161B 데이터 시트보기 (PDF) - Davicom Semiconductor, Inc.
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DM9161B Datasheet PDF : 45 Pages
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DM9161B
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
5.8 Pin Maps of Normal MII, Reduced MII, and 10Base-T GPSI (7-Wired) Mode
Pin No. Normal MII Mode
Reduced MII Mode
10Base-T GPSI (7-Wired) Mode
20,19 TXD [0:1]
TXD [0:1]
TXD [0] ; TXD [1] = NC
18,17 TXD [2:3]
NC, Tie to GND
NC, Tie to GND
21 TXEN
TXEN
TXEN
16 TXER/TXD [4]
NC, Tie to GND
NC, Tie to GND
22 TXCLK
NC
TXCLK
29,28 RXD [0:1]
RXD [0:1]
RXD [0] ; RXD [1] = NC
27,26 RXD[2:3]
NC
NC
38 RXER/RXD[4]/RPTR/NODE RPTR/NODE
RPTR/NODE
37 RXDV
CRS DV
NC
34 RXCLK
NC
RXCLK
36 COL
NC
COL
35 CRS
NC
CRS
(PHYADR [2:4])
(BP4B5B)
24 MDC
MDC
MDC
25 MDIO
MDIO
MDIO
40 RESET#
RESET#
RESET#
43 XT1 (25 MHz)
XT1 (pin43) or XT2 (pin 42) XT1 (25 MHz)
(REF_CLK 50MHz)
Final
10
Version: DM9161B-12-DS-F01
October 16, 2009
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