DS1225 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS1225 Datasheet PDF : 8 Pages
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www.maxim-ic.com
FEATURES
§ 10 years minimum data retention in the
absence of external power
§ Data is automatically protected during power
loss
§ Directly replaces 2k x 8 volatile static RAM
or EEPROM
§ Unlimited write cycles
§ Low-power CMOS
§ JEDEC standard 28-pin DIP package
§ Read and write access times as fast as 150 ns
§ Full ±10% operating range
§ Optional industrial temperature range of
-40°C to +85°C, designated IND
Not Recommended for New Design
DS1225Y
64k Nonvolatile SRAM
PIN ASSIGNMENT
NC 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
DQ0 11
DQ1 12
DQ2 13
GND 14
28 VCC
27 WE
26 NC
25 A8
24
A9
23 A11
22
OE
21 A10
20
CE
19 DQ7
18
DQ6
17
DQ5
16 DQ4
15 DQ3
24-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
PIN DESCRIPTION
A0-A12
- Address Inputs
DQ0-DQ7
- Data In/Data Out
CE
- Chip Enable
WE
- Write Enable
OE
VCC
GND
- Output Enable
- Power (+5V)
- Ground
DESCRIPTION
The DS1225Y 64k Nonvolatile SRAM is a 65,536-bit, fully static, nonvolatile RAM organized as 8192
words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which
constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAM can be used in place of existing 8k x 8 SRAMs directly conforming to
the popular bytewide 28-pin DIP standard. The DS1225Y also matches the pinout of the 2764 EPROM or
the 2864 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for micro-
processor interfacing.
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