Addressable Digital Potentiometer
REGISTER-0
OPTIONAL
CONTROL
COMMAND
DATA
DATA
BYTE
BYTE
BYTE
BYTE
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
0 1 0 1 A2 A1 A0 0
1 0 10 10 01
REG-0
POT-1
R/W = 0
WRITE POT-1
CONTROL
COMMAND
DATA
BYTE
BYTE
BYTE
MSB
LSB
MSB
LSB
MSB
LSB
0 1 0 1 A2 A1 A0 0
1 0 10 10 10
POT-1
R/W = 0
WRITE REGISTER-0 AND POT-1 (SAME VALUE)
CONTROL
BYTE
MSB
LSB
0 1 0 1 A2 A1 A0 0
COMMAND
BYTE
MSB
LSB
MSB
1 0 1 0 1 1 11
DATA
BYTE
LSB
REG-0/POT-1 VALUE
R/W = 0
Figure 5. 2-Wire Write Protocols
SDA
tBUF
tLOW
SCL
tHD:STA
STOP START
Figure 6. Timing Diagram
tR
tF
tHD:STA
tHD:DAT
tHIGH
tSU:DAT
tSU:STA
REPEATED
START
tSP
tSU:STO
Revision History
Pages changed at Rev1: 9, 10
Package Information
For the latest package outline information, go to
www.maxim-ic.com/DallasPackInfo.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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