DS1864T 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS1864T Datasheet PDF : 72 Pages
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SFP Laser Controller and
Diagnostic IC
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.97V to 5.5V, TA = -40°C to +95°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TIMING FOR SOFT CONTROL AND STATUS FUNCTIONS
TX-D Assert Time
tOFF
Time from TX-D set until DACs fall below
10% of nominal (Notes 13, 17)
TX-D Deassert time
tON
Time from TX-D cleared until DACs rise
above 90% of nominal (Notes 13, 17)
Time to Initialize, Including
Reset of TX-F
Time from power-on or negation of TX-F
tINIT
using TX-D;
serial communication possible
TX-F Assert Time
RX-LOS Assert Time
tFAULT
tLOS_ON
Time from fault to TX-F set (Note 17)
Time from occurrence of loss of signal to
RX-LOS set
RX-LOS Deassert Time
tLOS_OFF
Time from occurrence of presence of signal
to RX-LOS cleared
Rate-Select Change Time
tRATE_SEL
Time from change of state of rate-select bit
to rate-select output (RSELOUT) pin change
TYP MAX UNITS
10
ms
50
ms
200
ms
50
ms
50
ms
50
ms
50
ms
I2C AC ELECTRICAL CHARACTERISTICS
(VCC = 2.97V to 5.5V; TA = -40°C to +95°C, timing referenced to VIL(MAX) and VIH(MIN).) (See Figure 19)
PARAMETER
SCL Clock Frequency
Bus Free Time Between Stop and
Start Conditions
SYMBOL
fSCL (Note 14)
tBUF
CONDITIONS
MIN TYP
0
1.3
Hold Time (Repeated) Start
Condition
tHD:STA
0.6
Low Period of SCL
High Period of SCL
Data Hold Time
Data Setup Time
Start Setup Time
SDA and SCL Rise Time
tLOW
tHIGH
tHD:DAT
tSU:DAT
tSU:STA
tR
(Note 15)
1.3
0.6
0
100
0.6
20 +
0.1CB
SDA and SCL Fall Time
Stop Setup Time
SDA and SCL Capacitive
Loading
EEPROM Write Time
tF
(Note 15)
tSU:STO
CB
(Note 15)
tW
(Note 16)
20 +
0.1CB
0.6
10
MAX
400
UNITS
kHz
µs
µs
µs
µs
0.9
µs
ns
µs
300
ns
300
ns
µs
400
pF
20
ms
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