DS1865 데이터 시트보기 (PDF) - Maxim Integrated
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DS1865 Datasheet PDF : 67 Pages
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PON Triplexer Control and
Monitoring Circuit
Block Diagram
VCC
SDA
SCL
MON1
MON2
MON3
MON4
VCC
I2C
INTERFACE
EEPROM
128 BYTES AT
A0h SLAVE
ADDRESS
VCC
DS1865 MEMORY ORGANIZATION
MAIN MEMORY
EEPROM/SRAM
ADC CONFIGURATION/RESULTS
SYSTEM STATUS BITS
ALARM/WARNING COMPARISON RESULTS/THRESHOLDS
TABLE 01h (EEPROM)
PW1 USER MEMORY, ALARM TRAP
TABLE 02h (EEPROM)
CONFIGURATION AND CALIBRATION
TABLE 03h (EEPROM)
PW2 USER MEMORY
TABLE 04h (EEPROM)
MODULATION LUT
TABLE 05h (EEPROM)
APC LUT
TABLE 06h (EEPROM)
M4DAC (VIDEO GAIN LUT)
SRAM RESET
POWER-ON ANALOG
VCC > VPOA
NONMASKABLE
INTERRUPT
TEMP
SENSOR
13-BIT
ADC
DIGITAL LIMIT
COMPARATOR FOR
ADC RESULTS
INTERRUPT
MASK
LATCH
ENABLE
INTERRUPT
LATCH
INTERRUPT
MASK
INTERRUPT
LATCH
BEN
SAMPLE
CONTROL
MUX
BMD
BIAS MAX
QUICKTRIP
HBIAS QUICK-
TRIP LIMIT
MUX
HTXP QUICK-
TRIP LIMIT
LTXP QUICK-
TRIP LIMIT
MUX
8-BIT DAC
W/SCALING
DIGITAL APC
INTEGRATOR
13-BIT
DAC
APC SET POINT
FROM APC LUT
DS1865
8-BIT DAC
MOD LUT
W/SCALING
TX-D
D0
TTL
D0 IN/LOS STATUS
0
1
TTL
D0 OUT
INV LOSI
LOSI
MUX LOSI
D1
TTL
D1 IN
TABLE 06h
VIDEO POWER
LOOKUP TABLE
M4DAC
8-BIT, 2.5V
FULL SCALE
D1 OUT
I2C CONTROL
D2
TTL
D2 IN
I2C PROGRAMMED
NONVOLATILE SETTING
DAC1
8-BIT, 2.5V
FULL SCALE
D2 OUT
D3
TTL
D3 IN
D3 OUT
GND
TX-F
FETG
BIAS
MOD
M4DAC
DAC1
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