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DS2196 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2196
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS2196 Datasheet PDF : 160 Pages
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www.dalsemi.com
FEATURES
Two full featured framers and a short / long
haul Line Interface Unit (LIU) in one small
package
Based on Dallas Semiconductor’s Single-
Chip Transceiver family
Two HDLC Controllers with 64-byte buffers
that can be used for the FDL or for DS0
channels
Supports NPRMs and SPRMs as per ANSI
T1.403-1998
Can be combined with a short/long haul LIU
or a HDSL Modem Chip Set to create a low
cost Office Repeater / NIU / CSU, or a
HDSL1 / HDSL2 terminal unit with
enhanced monitoring and Data Link Control
Supports fractional T1
Can convert from D4 to ESF framing and
ESF to D4 framing
32–bit or 128–bit crystal–less jitter attenuator
Can generate and detect repeating in-band
patterns from 1 to 8 bits or 16 bits in length
Detects and generates RAI-CI and AIS-CI
Generates DS1 idle codes
On-chip programmable BERT generator and
detector
All key signals are routed to pins to support
numerous hardware configurations
DS2196
T1 Dual Framer LIU
Supports both NRZ and bipolar interfaces
Can create errors in the F-bit position and
BERT interface data paths
8–bit parallel control port that can be used
directly on either multiplexed or non-
multiplexed buses (Intel or Motorola)
IEEE 1149.1 JTAG Boundary Scan
3.3V supply with 5V tolerant inputs &
outputs
100-Pin LQFP (14 mm x 14 mm) Package
PACKAGE OUTLINE
100
1
ORDERING INFORMATION
DS2196L (0ºC to +70ºC)
DS2196LN (–40ºC to +85ºC)
DESCRIPTION
The DS2196 T1 Dual Framer LIU is designed for T1 transmission equipment. The DS2196 combines
dual optimized framers together with a line interface unit. This combination allows the DS2196 user to
extract and insert Facility Data Link (FDL) messages in the receive and transmit paths, collect line
performance data and perform basic channel conditioning and maintenance. The DS2196 contains all of
the necessary functions for connection to T1 lines whether they are DS1 long haul or DSX–1 short haul.
The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The
device can generate both DSX–1 line build outs as well as CSU line build outs of –7.5 dB, –15 dB, and
-22.5 dB. The onboard jitter attenuator (selectable to either 32 bits or 128 bits) can be placed in either the
transmit or receive data paths. The framer locates the frame and multiframe boundaries and monitors the
data stream for alarms. The device contains a set of internal registers which the user can access and
control the operation of the unit. Quick access via the parallel control port allows a single controller to
handle many T1 lines. The device fully meets all of the latest T1 specifications.
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033001

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