DS2196 데이터 시트보기 (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS2196 Datasheet PDF : 160 Pages
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TABLE OF CONTENTS
DS2196
1 INTRODUCTION ................................................................................................................................7
1.1 FEATURE HIGHLIGHTS ..................................................................................................................7
1.2 TYPICAL APPLICATIONS .............................................................................................................10
1.3 FUNCTIONAL DESCRIPTION .......................................................................................................10
2 PIN DESCRIPTION ..........................................................................................................................12
3 PIN FUNCTION DESCRIPTION ....................................................................................................15
4 REGISTER MAP ...............................................................................................................................23
5 PARALLEL PORT ............................................................................................................................30
6 CONTROL, ID, AND TEST REGISTERS .....................................................................................30
7 STATUS AND INFORMATION REGISTERS.............................................................................54
8 ERROR COUNT REGISTERS.......................................................................................................67
9 SIGNALING OPERATION ..............................................................................................................71
10 DS0 MONITORING FUNCTION...................................................................................................73
11 PER–CHANNEL CODE (IDLE) GENERATION AND LOOPBACK......................................75
11.1 TRANSMIT SIDE CODE GENERATION...................................................................................75
11.2 RECEIVE SIDE CODE GENERATION ......................................................................................76
12 PROGRAMMABLE IN–BAND CODE GENERATION AND DETECTION..........................77
13 CLOCK BLOCKING REGISTERS ..............................................................................................86
14 TRANSMIT TRANSPARENCY ....................................................................................................88
15 BERT FUNCTION ..........................................................................................................................89
15.1 BERT REGISTER DESCRIPTION ..............................................................................................91
16 ERROR INSERTION FUNCTION ...............................................................................................99
17 HDLC CONTROLLER.................................................................................................................102
17.1 HDLC FOR DS0S..........................................................................................................................103
18 FDL/FS EXTRACTION AND INSERTION...............................................................................104
18.1 HDLC AND BOC CONTROLLER FOR THE FDL ..................................................................104
18.1.1 General Overview .................................................................................................................104
18.1.2 Status Register for the HDLC ...............................................................................................106
18.1.3 Basic Operation Details.........................................................................................................106
18.1.4 HDLC/BOC Register Description.........................................................................................108
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