DS75LV 데이터 시트보기 (PDF) - Maxim Integrated

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DS75LV

Digital Thermometer and Thermostat

Maxim Integrated 

DS75LV

Digital Thermometer and Thermostat

Shutdown Mode

For power-sensitive applications, the DS75LV offers

a low-power shutdown mode. The SD bit in the

configuration register controls shutdown mode. When SD

is changed to 1, the conversion in progress is completed

and the result stored in the temperature register after

which the DS75LV goes into a low-power standby state.

The OS output is cleared if the thermostat is operating in

interrupt mode and OS remains unchanged in comparator

mode. The 2-wire interface remains operational in shut-

down mode, and writing a 0 to the SD bit returns the

DS75LV to normal operation.

Thermostat

The DS75LV thermostat has two operating modes, com-

parator mode and interrupt mode, which activate and

deactivate the open-drain thermostat output (OS) based

on user-programmable trip-points (TOS and THYST). The

DS75LV powers up with the thermostat in comparator

mode, active-low OS polarity, over-temperature trip-point

(TOS) register set to 80°C, and the hysteresis trip-point

(THYST) register set to 75°C. If these power-up settings

are compatible with the application, the DS75LV can be

used as a standalone thermostat (i.e., no 2–wire com-

munication required). If interrupt mode operation, active-

high OS polarity or different TOS and THYST values are

desired, they must be programmed after power-up, so

standalone operation is not possible.

In both operating modes, the user can program the ther-

mostat fault tolerance, which sets how many consecutive

temperature readings (1, 2, 4, or 6) must fall outside of

the thermostat limits before the thermostat output is trig-

gered. The fault tolerance is set by the F1 and F0 bits in

the configuration register. At power-up the fault tolerance

is set to 1.

The data format of the TOS and THYST registers is identical

to that of the temperature register (see Figure 3), i.e., a

2-byte two’s complement representation of the trip-point

temperature in degrees centigrade with bits 3 through 0

hardwired to 0. After every temperature conversion, the

measurement is compared to the values stored in the TOS

and THYST registers. The OS output is updated based on

the result of the comparison and the operating mode of the

IC. The number of TOS and THYST bits used during the

thermostat comparison is equal to the conversion resolution

set by the R1 and R0 bits in the configuration register. For

example, if the resolution is 9 bits, only the 9 MSbs of TOS

and THYST are used by the thermostat comparator.

The active state of the OS output can be changed via the

POL bit in the configuration register. The power-up default

is active low.

If the user does not wish to use the thermostat capabilities

of the DS75LV, the OS output should be left floating. Note

that if the thermostat is not used, the TOS and THYST

registers can be used for general storage of system data.

Comparator Mode: When the thermostat is in compara-

tor mode, OS can be programmed to operate with any

amount of hysteresis. The OS output becomes active

when the measured temperature exceeds the TOS value

a consecutive number of times as defined by the F1 and

F0 fault tolerance (FT) bits in the configuration register. OS

then stays active until the first time the temperature falls

below the value stored in THYST. Putting the device into

shutdown mode does not clear OS in comparator mode.

Thermostat comparator mode operation with FT = 2 is

illustrated in Figure 4.

Interrupt Mode: In interrupt mode, the OS output first

becomes active when the measured temperature exceeds

the TOS value a consecutive number of times equal to the

FT value in the configuration register. Once activated, OS

can only be cleared by either putting the DS75LV into

shutdown mode or by reading from any register (temperature,

configuration, TOS, or THYST ) on the device. Once OS

has been deactivated, it is only reactivated when the

measured temperature falls below the THYST value a

consecutive number of times equal to the FT value. Again,

OS can only be cleared by putting the device into shut-

down mode or reading any register. Thus, this interrupt/

clear process is cyclical between TOS and THYST events

(i.e, TOS, clear, THYST, clear, TOS, clear, THYST, clear,

etc.). Thermostat interrupt mode operation with FT = 2 is

illustrated in Figure 4.

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