TQ3131 데이터 시트보기 (PDF) - TriQuint Semiconductor

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TQ3131

3V Cellular Band CDMA/AMPS LNA IC

TriQuint Semiconductor 

Selection of the Vdd Bypass Cap for Optimum

Performance

The Vdd bypass capacitor has the largest effect on the LNA

output match, and is required for proper operation. Because the

input match affects the output match to some degree as well,

the process of picking the bypass cap value involves some

iteration. First, an input match is selected which gives adequate

gain and noise figure. Then the bypass capacitor is varied to

give the best output match. Generally, the poorer the chip

grounding, the smaller the bypass capacitor value will be. The

demo board achieves 11-12dB of return loss which is adequate

for connection directly to the input of a SAW filter.

Grounding

An optimal ground for the device is important in order to achieve

datasheet specified performance.

TQ3131

Data Sheet

Symptoms of a poor ground include reduced gain and the

inability to achieve >2:1 VSWR at the output when the input is

matched. It is recommended to use multiple vias to a mid

ground plane layer. The vias at pins 2 and 7 to this layer should

be as close to the lead pads as possible Additionally, the

ground return on the Vdd bypass cap should provide minimal

inductance back to chip pins 2 and 7.

TQ3131 S-Parameters

Following are S-Parameter graphs for both the high gain and the

AMPS modes. Data was taken on a single “nominal” device at

2.8v Vdd. The reference planes were set at the end of the

package pins. Note that the plots are almost identical for both

modes.

TQ3131 High Gain Mode S-Parameters S11

For additional information and latest specifications, see our website: www.triquint.com

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