EDGE6420 데이터 시트보기 (PDF) - Semtech Corporation

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EDGE6420

Per-Pin Electronics Companion DAC

Semtech Corporation 

Edge6420

HIGH-PERFORMANCE PRODUCTS – ATE

Circuit Description (continued)

DAC Voltage Output Overview

Minimum / Maximum Output Voltages

The output voltage of Group A, B, C, and D DACs is See Table 2 for the minimum and maximum possible

governed by the following equation:

voltages of a voltage output.

VOUT_[A:D] = KG[A:D] * VREF *

R_GAIN_[A:D]

R_MASTER *

DATA

8192

+ VOFFSET_[A:D]

Equation 1.

where:

DATA corresponds to the base-10 value of the binary data

loaded into the shift register shown in Figure 2.

DAC Setting

MSB ... LSB

0000H

1FFFH

VOUT_[A:D] (V)

VOFFSET_[A:D]

VMAX_[A:D]

KG[A:D] is a multiplying factor that is fixed, as follows:

KGA = 4

KGC = 8

KGB = 4

KGD = 4

Table 2. Minimum/Maximum Output Voltages

where:

VREF = 2.5V

VOFFSET[A:D] is defined in equation 2

Offset

and

The offset for each of the voltage DACs is governed by the

following equation:

VMAX_[A:D]

=

KG[A:D] * VREF *

R_GAIN_[A:D]

R_MASTER

* 8191

8192

+ VOFFSET_[A:D]

VOFFSET_[A:D] = KOFFSET * VREF *

0.5 – R_OFFSET_[A:D]

R_MASTER

where:

Equation 2.

Equation 3.

The most negative voltage possible for the Edge6420 is

–3.5V when VEE = –4.5V.

KOFFSET = 2

Resolution

VREF = 2.5V

The resolution of the DACs in Groups A, B, C, and D is:

External Resistors

The recommended resistor values for the above equations

are as follows:

VRANGE_[A:D] / 213

where VRANGE_[A:D] is defined in Equation 4.

Range

R_MASTER = 100KΩ (0.1% precision)

The range of the DACs in Groups A, B, C and D is:

R_GAIN_[A:D] = (0.4 to 1.15) * R_MASTER

R_OFFSET_[A:D] = (0.0 to 1.2) * R_MASTER

VRANGE_[A:D]

=

KG[A:D] * VREF *

R_GAIN_[A:D]

R_MASTER

*

8191

8192

Equation 4.

 2000 Semtech Corp.

7

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