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EDGE6435

Per-Pin Electronics Companion DAC

Semtech Corporation 

Edge6435/6436

TEST AND MEASUREMENT PRODUCTS

Circuit Description (continued)

Serial Programming

The Edge6435/6436 is programmed with 24-bit serial data

(Figure 6) in either a 4 channel (Figure 4) or 8 Channel

(Figure 5) format.

Following the input of serial data, it is loaded into a central

register by LOAD (Figure 1). The central register’s contents

are stored in the “addressed” latch by the STORE input.

Tables 3 and 4 show the “Address Maps” for the 4 and 8

channel formats.

belong to none, one, or any combination of up to 8 distinct

sets. The address maps show that a channel’s DAC (or

Function) may be addressed individually, or a DAC (or

Function) of multiple channels belonging to the same set

may be programmed in parallel. Figure 11 shows an

example of addressing channels by sets.

Referring to Table 3, a Channel’s function is programmed

as indicated in Figure 9 (offset and gain selection as well

as Group C DAC V/I output selection, see below).

Referring to Table 3 for 4 channel format, a channel’s

DACs Set Register or Function may be addressed and the

“stored” value changed. For each DAC, there are

associated multiple latches (Figures 2 and 3). For the

13-bit DACs (Figure 2) the DAC’s output is a function of

the contents of its value, gain and offset latches. The

Edge6435/6436 features two gain and offset latches per

DAC whereby a DAC’s output may be shared. For example,

in ATE a DAC’s value may be shared between a pin driver’s

high level and a pin’s parametric unit’s high limit level,

where each application requires different offset and gain

factors to calibrate each path correctly. Gains and offsets

are computed externally to the Edge6435/6436 in the

process of pin channel level calibration in the ATE. Gains

and offsets are stored in the Edge6435/6436 in the same

manner as other latches. Selection of what is stored is

determined by the “register selection” bits in the 24-bit

input data (Figures 2 and 4). Upon storing a 13-bit DAC’s

Value, the resultant DAC’s ((Value x Gain) + Offset +

4096

Value) is updated by UPDATEA (Figure 2) into the DAC’s

output latch of RANKA. The contents of all RANKA latches

may be transferred to RANKB latches, in parallel, across

multiple Edge6435/6436’s by the UPDATE input into the

Edge6435/6436. The RANK input into the Edge6435/

6436 selects either RANKA or RANKB latches for all DACs.

For the 6-bit DACs (Figure 3) the DAC’s output is selected

from four “value latches”.

Channel’s Functions (for 13 bit DACs only), with

R2 = R1 = R0 = 0, then:

D0 = 0: Selects 1st Offset/Gain Registers

D0 = 1: Selects 2nd Offset/Gain Registers

D1 = 0: Selects Voltage Output on Group C DACs

D1 = 1: Selects Current Output on Group C DACs

Referring to Table 4 for 8 channel format, and Figures 2,

3, 5, 8 and 10, a channel’s DACs, Set Registers and

Function, etc. are programmed and operate similar to the

4 channel format described above.

NOTE: The STORE of a DAC’s offset or gain does not

result in a DAC output change. Only upon the STORE of a

DAC or set of DAC’s “value” does the Edge6435/6436

compute the input to DAC’s “A” latches.

In a tester having multiple Edge6435/6436s, DACs or

channel functions may be programmed individually or as

a set (1 of 8) of channels across all channels. If multiple

E6435/6436s are programmed in parallel, individual DAC

or Function programming requires the STORE input to the

associated Edge6435/6436 to be applied where all STORE

inputs to other Edge6435/6436s are to be inhibited

(externally). Programming a DAC or Function of a Set of

Channels requires STORE input to be applied to all

Edge6435/6436s. Edge6435/6436’s DACs may be

“updated” in parallel following the programming of DACs

as individual DACs or sets of DACs.

Referring to Table 3, a channels Set Register may also be

programmed. This is an independent 8-bit register per

channel which determines the “sets” to which the channel

belongs. Figure 7 shows details of programming a

channel’s Set Register, which is stored in the

Edge6435/6436 by the STORE input. A channel may

 2006 Semtech Corp. / Rev. 3, 8/25/06

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