EL2150C 데이터 시트보기 (PDF) - Elantec -> Intersil
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EL2150C Datasheet PDF : 20 Pages
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EL2150C EL2157C
125 MHz Single Supply Clamping Op Amps
Closed Loop AC Electrical Characteristics
(Notes 2 6) VSe a5V GNDe0V TAe25 C VCMe a1 5V VOUTe a1 5V VCLAMPe a5V VENABLEe a5V AVe a1
RFe0X RLe150X to GND pin unless otherwise specified
Parameter
Description
Conditions
Test
Min Typ Max
Units
Level
BW
BW
GBWP
PM
SR
tR tF
OS
b3 dB Bandwidth (VOUTe400 mVp-p) VSe a5V AVe a1 RF e 0X
VSe a5V AVeb1 RFe500X
VSe a5V AVe a2 RFe500X
VSe a5V AVe a10 RFe500X
VSe a12V AVe a1 RFe0X
VSe a3V AVe a1 RFe0X
g0 1 dB Bandwidth (VOUTe400 mVp-p) VSe a12V AVe a1 RFe0X
VSe a5V AVe a1 RFe0X
VSe a3V AVe a1 RFe0X
Gain Bandwidth Product
VSe a12V AVe a10
Phase Margin
RLe1 kX CLe6 pF
Slew Rate
VSe a10V RLe150X Vout e 0V to a6V
VSe a5V RLe150X VOUTe0V to a3V
Rise Time Fall Time
g0 1V step
Overshoot
g0 1V step
125
60
60
6
150
100
25
30
20
60
55
200 275
300
28
10
V MHz
V MHz
V MHz
V MHz
V MHz
V MHz
V MHz
V MHz
V MHz
V MHz
V
I V ms
V V ms
V ns
V%
tPD
Propagation Delay
tS
0 1% Settling Time
0 01% Settling Time
dG
Differential Gain (Note 7)
dP
Differential Phase (Note 7)
eN
Input Noise Voltage
g0 1V step
32
VSe g5V RLe500X AVe a1 VOUTe g3V
40
VSe g5V RLe500X AVe a1 VOUTe g3V
75
AVe a2 RFe1 kX
0 05
AVe a2 RFe1 kX
0 05
fe10 kHz
48
V ns
V ns
V ns
V%
V
V nV0Hz
iN
Input Noise Current
fe10 kHz
1 25
V pA0Hz
tDIS
Disable Time (Note 8)
50
V ns
tEN
Enable Time (Note 8)
25
V ns
tCL
Clamp Overload Recovery
7
V ns
Note 1 Internal short circuit protection circuitry has been built into the EL2150C EL2157C See the Applications section
Note 2 CLAMP pin and ENABLE pin specifications apply only to the EL2157C
Note 3 If the disable feature is not desired tie the ENABLE pin to the VS pin or apply a logic high level to the ENABLE pin
Note 4 The maximum output voltage that can be clamped is limited to the maximum positive output Voltage or VOP Applying a
Voltage higher than VOP inactivates the clamp If the clamp feature is not desired either tie the CLAMP pin to the VS pin
or simply let the CLAMP pin float
Note 5 The clamp accuracy is affected by VIN and RL See the Typical Curves Section and the Clamp Accuracy vs VIN RL curve
Note 6 All AC tests are performed on a ‘‘warmed up’’ part except slew rate which is pulse tested
Note 7 Standard NTSC signal e 286 mVp-p fe3 58MHz as VIN is swept from 0 6V to 1 314V RL is DC coupled
Note 8 Disable Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply
current has reached half its final value
4
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