EL5411T 데이터 시트보기 (PDF) - Intersil

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EL5411T

60MHz Rail-to-Rail Input-Output Operational Amplifier

Intersil 

EL5411T

A snubber is a shunt load consisting of a resistor in series

with a capacitor. An optimized snubber can improve the

phase margin and the stability of the EL5411T. The

advantage of a snubber circuit is that it does not draw any

DC load current or reduce the gain.

Another method to reduce peaking is to add a series output

resistor (typically between 1Ω to 10Ω). Depending on the

capacitive loading, a small value resistor may be the most

appropriate choice to minimize any reduction in gain.

Power Dissipation

With the high-output drive capability of the EL5411T

amplifiers, it is possible to exceed the +150°C absolute

maximum junction temperature under certain load current

conditions. It is important to calculate the maximum power

dissipation of the EL5411T in the application. Proper load

conditions will ensure that the EL5411T junction temperature

stays within a safe operating region.

The maximum power dissipation allowed in a package is

determined according to Equation 1:

PDMAX

=

T----J---M-----A----X-----–-----T----A---M-----A----X--

θJA

(EQ. 1)

where:

• TJMAX = Maximum junction temperature

• TAMAX = Maximum ambient temperature

• ΘJA = Thermal resistance of the package

• PDMAX = Maximum power dissipation allowed

The total power dissipation produced by an IC is the total

quiescent supply current times the total power supply

voltage, plus the power dissipation in the IC due to the loads,

or:

PDMAX = Σi[V S × ISMAX + (V S+ – VOUTi ) × ILOADi ] (EQ. 2)

when sourcing, and:

PDMAX = Σi[VS × ISMAX + (VOUTi – VS- ) × ILOADi ]

(EQ. 3)

when sinking,

where:

• i = 1 to 4

(1, 2, 3, 4 corresponds to Channel A, B, C, D respectively)

• VS = Total supply voltage (VS+ - VS-)

• VS+ = Positive supply voltage

• VS- = Negative supply voltage

• ISMAX = Maximum supply current per amplifier

(ISMAX = EL5411T quiescent current ÷ 4)

• VOUT = Output voltage

• ILOAD = Load current

Device overheating can be avoided by calculating the

minimum resistive load condition, RLOAD, resulting in the

highest power dissipation. To find RLOAD set the two PDMAX

equations equal to each other and solve for VOUT/ILOAD.

Reference the package power dissipation curves, Figures 32

and 33, for further information.

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

1.2

962mW

1.0

0.8 893mW

TQFN16

θJA = +130°C/W

0.6

HTSSOP14

θJA = +140°C/W

0.4

0.2

0.0

0

25

50

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 32. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY (4-LAYER) TEST BOARD - EXPOSED

DIEPAD SOLDERED TO PCB PER JESD51-5

4.0

3.29W

3.5

3.0

3.13W

HTSSOP14

θJA = +38°C/W

2.5

TQFN16

2.0

θJA = +40°C/W

1.5

1.0

0.5

0.0

0

25

50

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

Thermal Shutdown

The EL5411T has a built-in thermal protection which ensures

safe operation and prevents internal damage to the device

due to overheating. When the die temperature reaches

+165°C (typical) the device automatically shuts OFF the

outputs by putting them in a high impedance state. When the

die cools by +15°C (typical) the device automatically turns

ON the outputs by putting them in a low impedance (normal)

operating state.

13

FN6837.1

October 8, 2009

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