EL6202CW-T7A 데이터 시트보기 (PDF) - Intersil

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EL6202CW-T7A

Laser Driver Oscillator

Intersil 

EL6202

For the current loop, the current flows through the supply

bypass-capacitor. The ground end of the bypass thus should

be connected directly to the EL6202 ground pin and laser

ground. A long ground return path will cause the bypass

capacitor currents to generate voltage drops in the ground

plane of the circuit board, and other components (such as

RFREQ) will pick this up as an interfering signal. Similarly,

the ground return of the load should be considered, as noisy

and other grounded components should not connect to this

path. Slotting the ground plane around the load's return will

reduce adjacent grounded components from seeing the

noise.

Power Dissipation

It is important to calculate the maximum junction

temperature for the application to determine if the conditions

need to be modified for the oscillator to remain in the safe

operating area.

The maximum power dissipation allowed in a package is

determined according to:

PDMAX = T----J---M-----A----X--Θ-----J---A-T----A----M----A----X--

where:

PDMAX = Maximum power dissipation in the package

TJMAX = Maximum junction temperature

TAMAX = Maximum ambient temperature

θJA = Thermal resistance of the package

The supply current of the EL6202 depends on the peak-to-

peak output current and the operating frequency which is

determined by resistor RFREQ. The supply current can be

predicted approximately by the following equations:

ISUP1

=

3----5----m-----A------×----1----k----Ω--- + 0.5mA

RFREQ

ISUP2 = 50 × IIN × 0.5

The power dissipation can be calculated from the following

equation:

PD = VSUP × ISUP1 + (VSUP - VLAS ) × ISUP2

Here, VSUP is the supply voltage and VLAS is the average

voltage of the laser diode. Figure 11 provides a convenient

way to see if the device may overheat. The maximum safe

power dissipation can be found graphically, based on the

ambient temperature and JEDEC standard single layer PCB.

For flex circuits, the θJA could be higher. By using the

previous equation, it is possible to estimate if PD exceeds

the device's power derating curve. To ensure proper

operation, it is important to observe the recommended

derating curve shown in Figure 12.

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.6

0.5

488mW

0.4

0.3

θJA =52-P5i6n°CS/OWT-23

0.2

0.1

0

0

25

50

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 11. PACKAGE POWER DISSIPATION vs

AMBIENT TEMPERATURE

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.6

0.5 543mW

0.4

0.3

θJA =52-3P0in°CS/WOT-23

0.2

0.1

0

0

25

50

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 12. PACKAGE POWER DISSIPATION vs

AMBIENT TEMPERATURE

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