EPM5192-1 데이터 시트보기 (PDF) - Altera Corporation

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EPM5192-1

Programmable Logic Device Family

Altera Corporation 

Figure 1. MAX 5000 Architecture

8 to 20

Dedicated

Inputs

MAX 5000 Programmable Logic Device Family Data Sheet

16

LAB A

PIA in

Multi-LAB

Devices Only

24

PIA

Feedback from

I/O Pins to LAB

(Single-LAB

Devices)

Macrocell

Array

Expander

Product-Term

Array

to All Other LABs

I/O

Control

Block

4 to 16

I/O Pins

per LAB

Macrocells are the primary resource for logic implementation. Additional

logic capability is available from expanders, which can be used to

supplement the capabilities of any macrocell. The expander product-term

array consists of a group of unallocated, inverted product terms that can

be used and shared by all macrocells in the LAB to create combinatorial

and registered logic. These flexible macrocells and shareable expanders

facilitate variable product-term designs without the inflexibility of fixed

product-term architectures. All macrocell outputs are globally routed

within an LAB via the LAB interconnect. The outputs of the macrocells

also feed the I/O control block, which consists of groups of

programmable tri-state buffers and I/O pins. In the EPM5064, EPM5128,

EPM5130, and EPM5192 devices, multiple LABs are connected by a PIA.

All macrocells feed the PIA to provide efficient routing for high-fan-in

designs.

Altera Corporation

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