FA3641N 데이터 시트보기 (PDF) - Fuji Electric

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FA3641N

PWM control IC with light load power saving function For Switching Power Supply Control

Fuji Electric 

s Description of each circuit

1. Oscillator

The oscillator generates a triangular waveform by charging and

discharging the built-in capacitor. A desired oscillation

frequency can be set by the value of the resistor connected to

the RT pin (See Figure 1).

The built-in capacitor voltage oscillates between about 3V and

1V, with almost the same charging and discharging gradients

(Figure 2). You can set the desired oscillation frequency by

changing the gradients using the resistor connected to the RT

pin. (Large Rt = low frequency, small Rt = high frequency) The

oscillation frequency is automatically lowered when output duty

cycle is small (FB Ϲ about 1.18V) in light load mode. For more

information, see item 2, “Reducing oscillation frequency circuit

in light-load mode.”

The relationship between Rt and the fixed oscillation frequency

is approximately given by:

f0 [kHz] Լ

4880

Rt + 1.4

..................................................... (1)

Rt [kΩ] Լ

4880

f0

– 1.4

fO: Fixed frequency [kHz]

Rt: Timing resistance [kΩ]

.......................................... (2)

The oscillator waveform cannot be observed from the

outside because a pin for this purpose is not provided.

The oscillator output is connected to a PWM comparator.

The RT pin is 2.5V DC in normal fixed frequency operation

mode. When the frequency is lowered, the voltage also

decreases linearly to about 1V.

2. Reducing oscillation frequency circuit in light-load mode

To reduce the loss of the power supply in standby mode, this

IC has a feature that automatically lowers the oscillation

frequency when the load is light. When the load is light, with

the result that the IC output pulse width narrows below about

10% and the FB pin voltage decreases below about 1.18V,

the oscillation frequency begins to decreases linearly until

the output pulse width becomes 0. When the output pulse

width is 0, the oscillation frequency is about 46% of normal

fixed frequency (Figure 3). Even while the oscillation

frequency is decreasing, the built-in capacitor voltage

oscillates between about 3V and 1V.

The frequency reduction rate (46%) can be adjusted from

the outside. (See “Design advice” for more information.)

3. PWM comparator

The PWM comparator has four inputs as shown in Figure 4.

Oscillator output ቢ is compared with CS pin voltage ባ, FB

pin voltage ቤ, and DT voltage ብ. The lowest of three inputs

ባ, ቤ, and ብ has priority and is compared with output ቢ.

While the voltage is lower than the oscillator output, the

comparator output is high. While the voltage is higher than

the oscillator output, the PWM comparator output is low (see

Figure 5). The IC OUT pin voltage is high while the PWM

comparator output is low.

When the IC is powered up, CS pin voltage ባ controls soft

start operation. The output pulse then begins to widen

gradually. During normal operation, the output pulse width is

determined within the maximum duty cycle (70%) set by DT

voltage ብ under the condition set by FB pin voltage ቤ, to

stabilize the output voltage.

FA3641P(N), FA3647P(N)

Fig. 1 Oscillator

Fig. 2 Oscillator output

Fig. 3 Oscillation frequency

Fig. 4 PWM comparator

Fig. 5 PWM comparator timing chart

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