FAN4174(2012) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FAN4174
(Rev.:2012)

Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier

Fairchild Semiconductor 

Physical Dimensions

3.00

2.80

5

4

1

(0.30)

2

3

0.95

1.90

TOP VIEW

A

B

3.00

2.60

1.70

1.50

SYMM

CL

0.95

0.95

2.60

0.50

0.30

0.20

1.00

CAB

0.70

LAND PATTERN RECOMMENDATION

SEE DETAIL A

1.30

0.90

0.15

0.05

8°

0°

0.55

0.35

0.60 REF

1.45 MAX

C

0.22

0.08

0.10 C

GAGE PLANE

0.25

NOTES: UNLESS OTHEWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MO-178, ISSUE B, VARIATION AA,

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) MA05Brev5

SEATING PLANE

Figure 31. 5-Lead SOT-23 Package

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the

warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

© 2004 Fairchild Semiconductor Corporation

FAN4174/FAN4274 • Rev. 1.0.8

11

www.fairchildsemi.com

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