PRODUCT SPECIFICATION
FAN5009
Electrical Specifications (continued)
Parameter
Low-Side Driver
Output Resistance, Sourcing
Current
Output Resistance, Sinking
Current
Transition Times2,4
Propagation Delay2,3
Symbol
Conditions
RLUP
RLDN
tR(LDRV)
tF(LDRV)
tpdh(LDRV)
tpdl(LDRV)
tpdh(ODRV)
See Figure 2
See Figures 2, 4
See Adaptive Gate
Drive Circuit
description
Min. Typ. Max. Units
3.4
4.0
Ω
1.4
1.8
Ω
40
50
ns
20
30
ns
20
30
ns
25
40
ns
240
ns
NOTES:
1. All limits at operating temperature extremes are guaranteed by design, characterization and statistical quality control
2. AC Specifications guaranteed by design/characterization (not production tested).
3. For propagation delays, “tpdh” refers to low-to-high signal transition and “tpdl” refers to high-to-low signal transition
4. Transition times are defined for 10% and 90% of DC values
OD
VIL(OD)
t pdl(OD)
VIH(OD)
t pdh(OD)
LDRV / HDRV
Figure 3. Output Disable Timing
VIH(PWM)
PWM
t pdl (LDRV)
LDRV
1.2V
t pdh(HDRV)
HDRV-SW
VIL(PWM)
t pdl (HDRV)
t pdh(LDRV)
SW
2.2V
Figure 4. Adaptive Gate Drive Timing
REV. 1.0.5 7/22/04
5