M29F040B45P6 데이터 시트보기 (PDF) - STMicroelectronics
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M29F040B45P6 Datasheet PDF : 21 Pages
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M29F040B
Table 2. Absolute Maximum Ratings (1)
Symbol
Parameter
Value
Unit
Ambient Operating Temperature (Temperature Range Option 1)
0 to 70
°C
TA
Ambient Operating Temperature (Temperature Range Option 6)
–40 to 85
°C
Ambient Operating Temperature (Temperature Range Option 3)
–40 to 125
°C
TBIAS
Temperature Under Bias
–50 to 125
°C
TSTG
Storage Temperature
–65 to 150
°C
VIO (2)
Input or Output Voltage
–0.6 to 6
V
VCC
Supply Voltage
–0.6 to 6
V
VID
Identification Voltage
–0.6 to 13.5
V
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.
SUMMARY DESCRIPTION
The M29F040B is a 4 Mbit (512Kb x8) non-volatile
memory that can be read, erased and repro-
grammed. These operations can be performed us-
ing a single 5V supply. On power-up the memory
defaults to its Read mode where it can be read in
the same way as a ROM or EPROM. The
M29F040B is fully backward compatible with the
M29F040.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in TSOP32 (8 x 20mm),
PLCC32 and PDIP32 packages and it is supplied
with all the bits erased (set to ‘1’).
Table 3. Uniform Block Addresses, M29F040B
#
Size
(Kbytes)
Address Range
7
64
70000h-7FFFFh
6
64
60000h-6FFFFh
5
64
50000h-5FFFFh
4
64
40000h-4FFFFh
3
64
30000h-3FFFFh
2
64
20000h-2FFFFh
1
64
10000h-1FFFFh
0
64
00000h-0FFFFh
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