PDM31096SA10SO 데이터 시트보기 (PDF) - Paradigm Technology
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PDM31096SA10SO Datasheet PDF : 8 Pages
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Features
n High-speed access times
Com’l: 8, 10, 12, 15, and 20 ns
Ind’l.: 12, 15 and 20 ns
n Low power operation
- PDM31096SA
Active: 300 mA (Max)
Standby: 25mW
n Single +3.3V (±0.3V) power supply
n TTL-compatible inputs and outputs
n Packages
Plastic SOJ (400 mil) - SO
Plastic TSOP (II) - T
PRELIMINARY
PDM31096
4 Megabit 3.3V Static RAM
Description
512K x 8-Bit
1
The PDM31096 is a high-performance CMOS static
RAM organized as 524,288 x 8 bits. Writing is
2 accomplished when the write enable (WE) and chip
enable CE inputs are both LOW. Reading is
accomplished when WE remains HIGH and CE and
OE are both LOW.
3 The PDM31096 operates from a single +3.3V power
supply and all the inputs and outputs are fully TTL-
compatible.
4 The PDM31096 is available in a 36-pin 400-mil plas-
tic SOJ package and a 44-pin plastic TSOP (II)
package.
5
6
Functional Block Diagram
A0
•
•
Addresses
•
•
•
A18
I/O 0
•
•
I/O 7
CE
WE
OE
Decoder
Input
Data
Control
• Memory
•
•
•
Matrix
•
•
•••••
Column I/O
•
•
•
7
8
9
10
11
12
Rev. 2.4 - 5/27/98
1
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