FDC6322 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FDC6322

Dual N & P Channel, Digital FET

Fairchild Semiconductor 

Typical Electrical Characteristics: P-Channel (continued)

5

I D = -0.25A

4

VDS = 5V

10V

15V

3

2

1

0

0

0.2

0.4

0.6

0.8

1

1.2

1.4

Qg , GATE CHARGE (nC)

2

1

0.3

0.1

0.03

0.01

0.1

RDS(ON) LIMIT

10m1sms

1s 100ms

VGS = -2.7V

SINGLE PULSE

RθJA = See Note 1b

A TA = 25°C

0.2

0.5

1

2

5

10 15 25 35

- VDS , DRAIN-SOURCE VOLTAGE (V)

Figure 17. Gate Charge Characteristics.

Figure 18. Maximum Safe Operating Area.

150

100

60

40

20

f = 1 MHz

10 VGS = 0 V

Ciss

Coss

Crss

5

0.1 0.2

0.5

1

2

5

10

25

-VDS , DRAIN TO SOURCE VOLTAGE (V)

Figure 19. Capacitance Characteristics.

5

4

SINGLE PULSE

RθJA =See note 1b

TA = 25°C

3

2

1

0

0.01

0.1

1

10

SINGLE PULSE TIME (SEC)

100 300

Figure 20. Single Pulse Maximum Power

Dissipation.

1

0.5

D = 0.5

0.2

0.1

0.05

0.02

0.2

0.1

0.05

0.02

0.01

Single Pulse

0.01

0.0001

0.001

0.01

0.1

1

t 1, TIME (sec)

RθJA (t) = r(t) * R θJA

R θJA = See Note 1b

P(pk)

t1 t 2

TJ - TA = P * R θJA(t)

Duty Cycle, D = t 1/ t 2

10

100

300

Figure 21. Transient Thermal Response Curve.

Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal

response will change depending on the circuit board design.

FDC6322C.Rev B1

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