FDS5672 데이터 시트보기 (PDF) - Fairchild Semiconductor
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FDS5672 Datasheet PDF : 12 Pages
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PSPICE Electrical Model
.SUBCKT FDS5672 2 1 3 ;
Ca 12 8 7e-10
Cb 15 14 7e-10
Cin 6 8 2.2e-10
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
Ebreak 11 7 17 18 67
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
Evtemp 20 6 18 22 1
It 8 17 1
Lgate 1 9 1.23e-9
Ldrain 2 5 1.0e-9
Lsource 3 7 0.18e-9
RLgate 1 9 12.3
RLdrain 2 5 10
RLsource 3 7 1.8
rev June 2005
GATE
1
DPLCAP 5
10
RSLC2
RSLC1
51
5
51
ESLC
DBREAK
11
LDRAIN
DRAIN
2
RLDRAIN
LGATE
RLGATE
-
ESG
6
8
+
EVTHRES
+ 19 -
EVTEMP
8
RGATE + 18 - 6
9
20 22
CIN
S1A
12 13
8
S2A
14
15
13
50
RDRAIN
16
21
+
17
EBREAK 18
-
MWEAK
DBODY
MMED
MSTRO
8
7
RSOURCE
LSOURCE
SOURCE
3
RLSOURCE
RBREAK
17
18
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 1e-3
Rgate 9 20 1.4
RSLC1 5 51 RSLCMOD 1.0e-6
RSLC2 5 50 1.0e3
Rsource 8 7 RsourceMOD 3.2e-3
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
S1B
S2B
CA
13
CB
+
+ 14
EGS
6
8
-
EDS
5
8
-
RVTEMP
19
IT
-
VBAT
+
8
22
RVTHRES
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*250),2.5))}
.MODEL DbodyMOD D (IS=4.5E-12 RS=4.7e-3 TRS1=1.5e-3 TRS2=2e-5
+ CJO=1.6e-9 M=0.55 TT=1.8e-8 XTI=3.0)
.MODEL DbreakMOD D (RS=2.5 TRS1=1.0e-3 TRS2=1e-6)
.MODEL DplcapMOD D (CJO=6.0e-10 IS=1.0e-30 N=10 M=0.45)
.MODEL MmedMOD NMOS (VTO=3.35 KP=4 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=1.4)
.MODEL MstroMOD NMOS (VTO=3.93 KP=50 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MweakMOD NMOS (VTO=2.82 KP=0.04 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=14 RS=0.1)
.MODEL RbreakMOD RES (TC1=7e-4 TC2=-1.3e-7)
.MODEL RdrainMOD RES (TC1=1.0e-4 TC2=1e-5)
.MODEL RSLCMOD RES (TC1=1.0e-2 TC2=1e-7)
.MODEL RsourceMOD RES (TC1=1.0e-2 TC2=1.0e-6)
.MODEL RvthresMOD RES (TC1=-3.9e-3 TC2=-1.4e-5)
.MODEL RvtempMOD RES (TC1=-4e-3 TC2=2e-7)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.0 VOFF=-2.0)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.0 VOFF=-4.0)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=0)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0 VOFF=-0.5)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
©2005 Fairchild Semiconductor Corporation
9
FDS5672 Rev. A
www.fairchildsemi.com
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