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VG26S17400ET-6 데이터 시트보기 (PDF) - Vanguard International Semiconductor

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VG26S17400ET-6
VIS
Vanguard International Semiconductor  VIS
VG26S17400ET-6 Datasheet PDF : 25 Pages
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VIS
VG26(V)(S)17400E
4,194,304 x 4 - Bit
CMOS Dynamic RAM
DC Characteristics ; 3.3 - Volt Version (cont.)
(Ta = 0 to 70°C, VCC = + 3.3V±10%, VSS= 0V)
VG26 (V) (S) 17400E
Parameter
Symbol
Test Conditions
-5
-6
Unit Notes
Min Max Min Max
Input leakage
current
ILI 0V Vin VCC + 0.3V
-5 5 -5 5 µA
Output leakage
current
ILO 0V Vout VCC + 0.3V
Dout = Disable
-5 5 -5 5 µA
Output high
voltage
VOH lOH = -2mA
2.4
- 2.4
-V
Output low
voltage
VOL lOL = + 2mA
- 0.4 - 0.4 V
Notes :
1. lCC is specified as an average current. It depends on output loading condition and cycle rate when
the device is selected. lCC max is specified at the output open condition.
2. Address can be changed once or less while RAS = VIL.
3. For lCC4, address can be changed once or less within one Fast page mode cycle time.
Document : 1G5-0142
Rev.1
Page 9

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