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FPF1003(2006_07) 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FPF1003
(Rev.:2006_07)
Fairchild
Fairchild Semiconductor Fairchild
FPF1003 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Description of Operation
The FPF1003 is a low RDS(ON) P-Channel load switch with
controlled turn-on. The core of each device is a 30m
P-Channel MOSFET and a controller capable of functioning
over a wide input operating range of 1.2-5.5V. Switch control is
by a logic input (ON) capable of interfacing directly with low
voltage control signal.
Application Information
Typical Application
Battery
1.2V-5.5V
-
OFF ON
C1 = 1µF
VIN
VOUT
FPF1003
ON
GND
TO LOAD
C2 = 0.1µF
R1 = 499
Input Capacitor
To limit the voltage drop on the input supply caused by transient
in-rush currents when the switch turns-on into a discharged load
capacitor or short-circuit, a capacitor needs to be placed
between VIN and GND. A 1µF ceramic capacitor, CIN, placed
close to the pins is usually sufficient. Higher values of CIN can
be used to further reduce the voltage drop.
Output Capacitor
A 0.1µF capacitor, COUT, should be placed between VOUT and
GND. This capacitor will prevent parasitic board inductance
from forcing VOUT below GND when the switch turns-off. Due to
the integral body diode in the PMOS switch, a CIN greater than
COUT is highly recommended. A COUT greater than CIN can
cause VOUT to exceed VIN when the system supply is removed.
This could result in current flow through the body diode from
VOUT to VIN.
Board Layout
For best performance, all traces should be as short as possible.
To be most effective, the input and output capacitors should be
placed close to the device to minimize the effects that parasitic
trace inductances may have on normal and short-circuit
operation. Using wide traces for VIN, VOUT and GND will help
minimize the parasitic electrical effects along with minimizing
the case to ambient thermal impedance.
FPF1003 Rev. G
7
www.fairchildsemi.com

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