LC66354B 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LC66354B Datasheet PDF : 23 Pages
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LC66354B, 66356B, 66358B
Continued from preceding page.
Parameter
Symbol
Applicable pins
Conditions
min
Ceramic
oscillator
Oscillator
frequency
Oscillator
stabilization
time
fCF
OSC1, OSC2
fCFS
Figure 2, 4 MHz
Figure 3, 4 MHz
Cycle Input
time Output
tCKCY
0.9
2.0
Serial clock
Low
level/ Input
high
level
pulse Output
widths
tCKL
tCKH
SCK0, SCK1
0.4
The timing from Figure 4
and the test load from
Figure 5
1.0
Rise/
fall Output
times
tCKR
tCKF
Data setup time
tICK
Serial input
SI0, SI1
Data hold time
tCKI
Stipulated with respect to
the rising edge timing for
0.3
SCK0 and SCK1 from
Figure 4
0.3
Serial output Output delay
time
tCKO
SO0, SO1
Stipulated with respect to
the rising edge timing for
SCK0 and SCK1 from
Figure 4 and the test load
shown in Figure 5
INT0 high/low
level pulse
widths
tIOH
tIOL
INT0
• Conditions such that
the INT0 interrupt is
accepted
• Conditions such that
timer 0 event counter
2
and pulse width
measurement inputs
are accepted.
Pulse
High/low level
conditions
pulse widths for
tIIH
interrupt inputs
tIIL
other than INT0
INT1, INT2
Figure 6 • Conditions such that
all interrupts are
accepted
2
PIN1 high/low
level pulse
widths
tPINH
tPINL
PIN1
• Conditions such that
timer 1 event counter
2
inputs are accepted.
RES high/low
level pulse
widths
tRSH
tRSL
RES
• Conditions such that
reset occurs
3
Comparator response speed
Operating mode current drain
TRS
PD
IDD OP VDD
Figure 7
Using a 4 MHz ceramic
oscillator
Using a 4 MHz external
clock
HALT mode current drain
IDDHALT VDD
Using a 4 MHz ceramic
oscillator
Using a 4 MHz external
clock
Hold-mode current drain
IDDHOLD VDD
VDD = 1.8 to 5.5 V
Ratings
typ
4.0
3.0
3.0
1.0
1.0
0.01
Unit Note
max
MHz
10
ms
µs
Tcyc
µs
Tcyc
0.1
µs
µs
µs
0.3
µs
Tcyc
Tcyc
Tcyc
Tcyc
20
ms
5.0
mA
8
5.0
mA
2.0
mA
2.0
mA
10
µA
Note: 1. Common input and output ports with open-drain output specifications are specified for the state with the output n-channel transistor turned off.
These pins cannot be used for input when the CMOS output specification option is selected.
2. Common input and output ports with open-drain output specifications are specified for the state with the output n-channel transistor turned off.
Ratings for pull-up output specification pins are stipulated for the output pull-up current IPO. These pins cannot be used for input when the CMOS
output specification option is selected.
3. Stipulated for CMOS output specifications with the output n-channel transistor in the off state.
4. Stipulated for pull-up output specifications with the output n-channel transistor in the off state.
5. Stipulated for open-drain output specifications with the output n-channel transistor in the off state.
6. In the reset state
No. 4677-9/23
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