FSA1259 데이터 시트보기 (PDF) - Fairchild Semiconductor

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FSA1259

(FSA1256x - FSA1258x) Low RON Low Voltage Dual SPST Analog Switch

Fairchild Semiconductor 

Physical Dimensions

0.15

8

3.1±.1

1.55

1

PIN #1 IDENT.

5

-B-

2.3±0.1

4

0.2 C B A

ALL LEAD TIPS

1.80

0.70

1.00

0.5 TYP

0.30 TYP

0.90 MAX

ALL LEAD TIPS

0.1 C

0.70±0.10

-C-

0.50TYP

0.10

0.00

0.17-0.27

0.13 A B C

DETAIL A

0.10-0.18

0.4 TYP

A. CONFORMS TO JEDEC REGISTRATION MO-187

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,

AND TIE BAR EXTRUSIONS.

D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.

0°-8°

GAGE PLANE

0.12

SEATING PLANE

DETAIL A

MAB08AREVC

Figure 17. 8-Lead US8, JEDEC MO-187, Variation CA, 3.0mm Wide Package

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,

specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

© 2007 Fairchild Semiconductor Corporation

FSA1259 / FSA1259A Rev. 1.0.6

10

www.fairchildsemi.com

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