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UPD75P3018GC-3B9 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD75P3018GC-3B9
NEC
NEC => Renesas Technology NEC
UPD75P3018GC-3B9 Datasheet PDF : 60 Pages
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µPD75P3018
3. PIN FUNCTIONS
3.1 Port Pins (1/2)
Pin name
I/O
Shared by
P00
Input INT4
P01
I/O SCK
P02
I/O SO/SB0
Function
This is a 4-bit input port (PORT0).
P01 to P03 are 3-bit pins for which an internal
pull-up resistor connection can be specified
by software.
8-bit
I/O
Status I/O circuit
after reset type Note 1
Input
<B>
<F>-A
<F>-B
P03
I/O SI/SB1
<M>-C
P10
Input INT0
This is a 4-bit input port (PORT1).
Input
<B>-C
These are 4-bit pins for which an internal pull-up
P11
INT1
resistor connection can be specified by software.
INT0 includes noise elimination function.
P12
TI1/TI2/INT2
P13
TI0
P20
I/O PTO0
This is a 4-bit I/O port (PORT2).
Input
E-B
These are 4-bit pins for which an internal pull-up
P21
PTO1
resistor connection can be specified by software.
P22
PCL/PTO2
P23
BUZ
P30
I/O LCDCL/MD0
This is a programmable 4-bit I/O port (PORT3).
Input
E-B
Input and output in single-bit units can be specified.
P31
SYNC/MD1
When set for 4-bit units, an internal pull-up resistor
connection can be specified by software.
P32
MD2
P33
MD3
P40 Note 2
*
P41 Note 2
P42 Note 2
I/O D0
D1
D2
This is an N-ch open-drain 4-bit I/O port (PORT4).
When set to open-drain, voltage is 13 V.
Also functions as data I/O pin (lower 4 bits)
for program memory (PROM) write/verify.
š
High
M-E
impedance
P43 Note 2
D3
P50 Note 2
*
P51 Note 2
P52 Note 2
I/O D4
D5
D6
This is an N-ch open-drain 4-bit I/O port (PORT5).
When set to open-drain, voltage is 13 V.
Also functions as data I/O pin (upper 4 bits)
for program memory (PROM) write/verify.
High
M-E
impedance
P53 Note 2
D7
Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input.
2. Low-level input leakage current increases when input instructions or bit manipulation instructions are executed.
6

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