LC662312A 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC662312A

Four-Bit Single-Chip Microcontrollers with 4, 6, 8, 12, and 16 KB of On-Chip ROM

SANYO -> Panasonic 

LC662304A, 662306A, 662308A, 662312A, 662316A

Continued from preceding page.

Pin

P50

P51

P52

P53/INT2

I/O

Overview

Output driver type

Options

I/O ports P50 to P53

• Input or output in 4-bit or 1-bit units

I/O

• Input or output in 8-bit units when used

in conjunction with P40 to P43.

• Can be used for output of 8-bit ROM

data when used in conjunction with

P40 to P43.

• Pch: Pull-up MOS type

• Nch: Intermediate sink current

type

• Pull-up MOS or

Nch OD output

• Output level on

reset

• P53 is also used as the INT2 interrupt

request.

State after a Standby mode

reset

operation

High or low

(option)

Hold mode:

Output off

Halt mode:

Output

retained

P60/ML

P61

P62/DT

P63/PIN1

I/O ports P60 to P63

• Input or output in 4-bit or 1-bit units

• Pch: CMOS type

• P60 is also used as the melody output • Nch: Intermediate sink current

I/O

ML pin.

type

• P62 is also used as the tone output DT • Nch: +12-V handling when

CMOS or Nch OD

output

pin.

OD option selected (P61 and

• P63 is also used for the event count

P63 only)

input to timer 1.

Hold mode:

Output off

H

Halt mode:

Output

retained

PC2

PC3

I/O

I/O ports PC2 to PC3

Output in 2-bit or 1-bit units

• Pch: CMOS type

• Nch: Intermediate sink current

type

CMOS or Nch OD

output

Hold mode:

Port output

off

H

Halt mode:

Port output

retained

PD0/INV2I

PD1/INV2O

PD2/INV3I

PD3/INV4O

I

Dedicated input ports PD0 to PD3

Dedicated inverter circuits (option)

• When the inverter circuit

option is selected.

• Pch: CMOS type

• Nch: Intermediate sink current

type

Inverter circuits

PE0

PE1

I Dedicated input ports

OSC1

OSC2

I System clock oscillator connections

When an external clock is used, leave

O OSC2 open and connect the clock signal

to OSC1.

RES

System reset input

I

When the P33/HOLD pin is at the high

level, a low level input to the RES pin will

initialize the CPU.

TEST

CPU test pin

I This pin must be connected to VSS

during normal operation.

VDD

VSS

Power supply pins

Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to VDD.

CMOS output: Complementary output.

OD output: Open-drain output.

Ceramic oscillator

or external clock

selection

Normal

input or

inverter I/O

(option)

Inverter

• Hold

mode:

output off

• Halt mode:

output

continues

Normal

input

Option

selection

Hold mode:

Oscillator

stops

Halt mode:

Oscillator

continues

No. 5483-6/25

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