UPD754144 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPD754144

4-BIT SINGLE-CHIP MICROCONTROLLERS

NEC => Renesas Technology 

µPD754144, 754244

3.2 Non-port Pins

Pin Name

PTO0

PTO1

PTO2

INT0

KR4 to KR7

PTH00

PTH01

KRREN

AVREF

CL1

CL2

Input/Output

Alternate

Function

Function

I/O Circuit

After Reset

TYPENote

Output

Input

Input

Input

Input

Input

P30

P31

P32

P61

P70 to P73

P62

P63

–

P60

Timer counter output pins

Edge detection vectored

interrupt input pin

(detected edge can be

selected)

Noise elimination circuit

can be selected.

Noise elimination

circuit can be

selected.

Asynchronous

input

Falling edge detection testable input pins

Threshold voltage-variable 2-bit analog input pins

Key return reset enable pin

The reset signal is generated at the falling edge

of KRn while KRREN is high in STOP mode.

Reference voltage input pin

Input

Input

Input

Input

Input

Input

E-B

F -A

B -A

F -A

B

F -A

–

–

Incorporated in the µPD754144 only

–

–

RC (for system clock oscillation) connection pin

–

External clock cannot be input.

X1

X2

RESET

IC

VDD

VSS

Input

–

Input

–

–

–

–

Incorporated in the µPD754244 only

–

Crystal/ceramic resonator (for system clock

oscillation) connection pin

When inputting the external clock, input the external

clock to pin X1 and input the inverted phase of the

external clock to pin X2.

–

System reset input pin (low-level active)

–

Pull-up resistor can be incorporated (mask option).

–

Internally Connected Connect directly to VDD.

–

–

Positive supply pin

–

–

Ground potential

–

–

B -A

–

–

–

Note Circled characters indicate the Schmitt-trigger input.

10

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