GS84118B-100 데이터 시트보기 (PDF) - Giga Semiconductor

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GS84118B-100

256K x 18 Sync Cache Tag

Giga Semiconductor 

Functional Block Diagram

GS84118T/B-166/150/130/100

A0-17

18

REGISTER

DQ

A0

A1

LBO

ADV

CLK

ADSC

ADSP

A0

D0

Q0 A1

BINARY

D1 COUNTER Q1

Load

GW

BWE

Register

DQ

BW1

Register

DQ

BW2

18

A

256K X 18

Memory

Array

Q

D

18

18

2

DE

Register

DQ

CE1

CE2

CE3

ZZ

Powerdown

Control

Register

DQ

Register

DQ

FT

OE

MOE

A, DQ,

Control

54

Boundary Scan

Registers

18

DQ1-16

DQP1-2

Bypass Reg

TDI

TDO

ID Reg.

Instruction Reg.

TMS

TAP

TCK

Controller

Rev: 1.05 7/2001

6/30

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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© 1999, Giga Semiconductor, Inc.

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